drm/i915/icl: Set graphics mode register for gen11
authorKelvin Gardiner <kelvin.gardiner@intel.com>
Tue, 30 Jan 2018 13:49:17 +0000 (11:49 -0200)
committerPaulo Zanoni <paulo.r.zanoni@intel.com>
Wed, 31 Jan 2018 16:29:52 +0000 (14:29 -0200)
commit225701fc20ef9c0219a1119a9495c39c30797a4b
tree5d037f7e619a8366cd66e0692c9e769b0fb9a49b
parentb597277643fef8f2eab35a6c812b6f98094a0de1
drm/i915/icl: Set graphics mode register for gen11

This patch clears a single bit. The bit is 0 by default but expected
not to be set. Explicitly clearing the bit in this patch is intended
to indicate some thinking has occurred, and that we want this bit
cleared and we are not just excepting the default value.

We also stop setting GFX_RUN_LIST_ENABLE, which is correct since that
bit is gone.

v2 (from Paulo): fix indentation.
v3: Changed GEN check to >= 11. Corrected author name.
v4 (from Paulo): improve commit message (Daniele).

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Kelvin Gardiner <kelvin.gardiner@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180130134918.32283-9-paulo.r.zanoni@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_lrc.c