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(parent: a5ebc33) | patch
clk: sunxi-ng: Add check for minimal rate to NM PLLs
authorJernej Skrabec <jernej.skrabec@siol.net>
Thu, 1 Mar 2018 21:34:27 +0000 (22:34 +0100)
committerMaxime Ripard <maxime.ripard@bootlin.com>
Fri, 2 Mar 2018 07:42:14 +0000 (08:42 +0100)
commit2d2b61c13a4b39c8ba6b9c1daa79d5891689864e
treeedc1c7a176a8e6c88b3f4ec3fd4a8a16801042b3tree | snapshot
parenta5ebc3368ef7c77da5a03ad52834520a634a36efcommit | diff
clk: sunxi-ng: Add check for minimal rate to NM PLLs

Some NM PLLs doesn't work well when their output clock rate is set below
certain rate.

Add support for that constrain.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
drivers/clk/sunxi-ng/ccu_nm.c diff | blob | history
drivers/clk/sunxi-ng/ccu_nm.h diff | blob | history
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