x86/mm/tlb: Always use lazy TLB mode
authorRik van Riel <riel@surriel.com>
Wed, 26 Sep 2018 03:58:38 +0000 (23:58 -0400)
committerPeter Zijlstra <peterz@infradead.org>
Tue, 9 Oct 2018 14:51:11 +0000 (16:51 +0200)
commit5462bc3a9a3c38328bbbd276d51164c7cf21d6a8
tree2581f1146d6bfca6fec8a02a3133049950550ab6
parenta31acd3ee8f7dbc0370bdf4a4bfef7a8c13c7542
x86/mm/tlb: Always use lazy TLB mode

On most workloads, the number of context switches far exceeds the
number of TLB flushes sent. Optimizing the context switches, by always
using lazy TLB mode, speeds up those workloads.

This patch results in about a 1% reduction in CPU use on a two socket
Broadwell system running a memcache like workload.

Cc: npiggin@gmail.com
Cc: efault@gmx.de
Cc: will.deacon@arm.com
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: kernel-team@fb.com
Cc: hpa@zytor.com
Cc: luto@kernel.org
Tested-by: Song Liu <songliubraving@fb.com>
Signed-off-by: Rik van Riel <riel@surriel.com>
(cherry picked from commit 95b0e6357d3e4e05349668940d7ff8f3b7e7e11e)
Acked-by: Dave Hansen <dave.hansen@intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20180716190337.26133-7-riel@surriel.com
arch/x86/include/asm/tlbflush.h
arch/x86/mm/tlb.c