projects / openwrt / staging / blogic.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 254764e) | patch
net/mlx4_core: A write memory barrier is sufficient in EQ ci update
authorTariq Toukan <tariqt@mellanox.com>
Tue, 22 Jan 2019 13:25:50 +0000 (15:25 +0200)
committerDavid S. Miller <davem@davemloft.net>
Fri, 25 Jan 2019 05:54:13 +0000 (21:54 -0800)
commit5e5b9f6272f2c537c43bc80607079cdf8fdb50aa
treedd5a519de58a5f74ea990c5614f20926527d2418tree | snapshot
parent254764e55652d47fe81a54d7c226f3ba230180fecommit | diff
net/mlx4_core: A write memory barrier is sufficient in EQ ci update

Soften the memory barrier call of mb() by a sufficient wmb() in the
consumer index update of the event queues.

Suggested-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlx4/eq.c diff | blob | history
John Crispins staging tree