clk: mvebu: armada-37xx-periph: Fix switching CPU rate from 300Mhz to 1.2GHz
authorGregory CLEMENT <gregory.clement@bootlin.com>
Tue, 19 Jun 2018 12:34:45 +0000 (14:34 +0200)
committerStephen Boyd <sboyd@kernel.org>
Mon, 9 Jul 2018 16:44:06 +0000 (09:44 -0700)
commit61c40f35f5cd6f67ccbd7319a1722eb78c815989
tree263a936645bdf64ef5a03147ac22fb371f29a763
parent974c7c6d7ba5a4b12d99456b0599aa6326dc2b69
clk: mvebu: armada-37xx-periph: Fix switching CPU rate from 300Mhz to 1.2GHz

Switching the CPU from the L2 or L3 frequencies (300 and 200 Mhz
respectively) to L0 frequency (1.2 Ghz) requires a significant amount
of time to let VDD stabilize to the appropriate voltage. This amount of
time is large enough that it cannot be covered by the hardware
countdown register. Due to this, the CPU might start operating at L0
before the voltage is stabilized, leading to CPU stalls.

To work around this problem, we prevent switching directly from the
L2/L3 frequencies to the L0 frequency, and instead switch to the L1
frequency in-between. The sequence therefore becomes:

1. First switch from L2/L3(200/300MHz) to L1(600MHZ)
2. Sleep 20ms for stabling VDD voltage
3. Then switch from L1(600MHZ) to L0(1200Mhz).

It is based on the work done by Ken Ma <make@marvell.com>

Cc: stable@vger.kernel.org
Fixes: 2089dc33ea0e ("clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks")
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mvebu/armada-37xx-periph.c