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(parent: 2ef0f03) | patch
iommu/arm-smmu: Clear global and context bank fault status registers
authorAndreas Herrmann <andreas.herrmann@calxeda.com>
Tue, 1 Oct 2013 12:39:09 +0000 (13:39 +0100)
committerWill Deacon <will.deacon@arm.com>
Wed, 9 Oct 2013 13:14:41 +0000 (14:14 +0100)
commit659db6f6beacae6fe49b5566debc4e82f678ff63
tree76f38b1f4dc8da72d9f289fa28f46404f13e52e1tree | snapshot
parent2ef0f03120ea2ad64d0e70f032a58e6c13603cdccommit | diff
iommu/arm-smmu: Clear global and context bank fault status registers

After reset these registers have unknown values.
This might cause problems when evaluating SMMU_GFSR and/or SMMU_CB_FSR
in handlers for combined interrupts.

Signed-off-by: Andreas Herrmann <andreas.herrmann@calxeda.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
drivers/iommu/arm-smmu.c diff | blob | history
John Crispins staging tree