drm/i915/tgl: Add new pll ids
authorVandita Kulkarni <vandita.kulkarni@intel.com>
Thu, 11 Jul 2019 17:31:04 +0000 (10:31 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Thu, 11 Jul 2019 23:31:12 +0000 (16:31 -0700)
commit68ff39c3f8c01b1e640d111abdcf814804a6b236
treea891f805842409034fedcf2615a228f79376dd60
parent1db27a7291195057e3a20fb9998e2d365ee897f9
drm/i915/tgl: Add new pll ids

Add 2 new PLLs for additional TC ports. The names for the PLLs on TGL
changed, but most registers remained the same, like MGPLL5_ENABLE,
MGPLL6_ENABLE. So continue to use the name from ICL.

Cc: Madhav Chauhan <madhav.chauhan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190711173115.28296-11-lucas.demarchi@intel.com
drivers/gpu/drm/i915/display/intel_dpll_mgr.h