mmc: sdhci-esdhc-imx: fix reading cap_1 register value for mx6sl
authorDong Aisheng <b29396@freescale.com>
Fri, 18 Oct 2013 11:48:44 +0000 (19:48 +0800)
committerChris Ball <chris@printf.net>
Mon, 21 Oct 2013 19:58:03 +0000 (15:58 -0400)
commit6b4fb6712a4c58b205c163e9080c349d71c208d0
treefa1a5e3eefb4ce2a6f4b48076e58f32ad5d63433
parent6e9fd28e1f2422e8e5ad3c9871c952aad6a7e5ca
mmc: sdhci-esdhc-imx: fix reading cap_1 register value for mx6sl

When reading CAP_1 register for mx6sl, ignore bit[0-15] as it stores
CAP_2 register value which is new introduced in mx6sl.

Without this fix, the max clock for mx6sl may not be correct since
it's wrongly calculated by reading CAP_1 register.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
drivers/mmc/host/sdhci-esdhc-imx.c