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(parent: 8e79561) | patch
clk: exynos4: Define {E,V}PLL registers
authorTomasz Figa <t.figa@samsung.com>
Thu, 4 Apr 2013 04:33:30 +0000 (13:33 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Thu, 4 Apr 2013 06:51:15 +0000 (15:51 +0900)
commit6d7190f846e74be2cbaae4cd56d1a5385e46f6ff
tree23f68157344c8484287feb5821cc63c1c3ea27dbtree | snapshot
parent8e79561c41ec7746361a1e9a079c7225e010515ecommit | diff
clk: exynos4: Define {E,V}PLL registers

This patch adds preprocessor definitions of EPLL and VPLL registers and
replaces all occurences of offsets of related registers with new
definitions.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
drivers/clk/samsung/clk-exynos4.c diff | blob | history
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