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(parent: a44d1f5) | patch
clk: hi3798cv200: add COMBPHY0 clock support
authorJianguo Sun <sunjianguo1@huawei.com>
Wed, 24 Jan 2018 11:48:27 +0000 (19:48 +0800)
committerShawn Guo <shawnguo@kernel.org>
Tue, 27 Feb 2018 01:19:12 +0000 (09:19 +0800)
commit80f8ce589517c478abdae07a758b37b362886cb2
treeef60a3ff5b9330f5350777f1885fbc7cfccf3abctree | snapshot
parenta44d1f531a39da8cd6497372e713f5998b2d67afcommit | diff
clk: hi3798cv200: add COMBPHY0 clock support

The clock COMBPHY1 has already been supported by hi3798cv200 driver,
but COMBPHY0 is missing.  It adds COMBPHY0 clock support.

Since the mux table is being shared by COMBPHY0 and COMBPHY1, it renames
comphy1_mux_p and comphy1_mux_table a bit to drop instance number '1'
from there.

Signed-off-by: Jianguo Sun <sunjianguo1@huawei.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
drivers/clk/hisilicon/crg-hi3798cv200.c diff | blob | history
include/dt-bindings/clock/histb-clock.h diff | blob | history
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