drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection
authorKelvin Gardiner <kelvin.gardiner@intel.com>
Tue, 20 Mar 2018 19:45:21 +0000 (12:45 -0700)
committerMika Kuoppala <mika.kuoppala@linux.intel.com>
Wed, 21 Mar 2018 08:36:33 +0000 (10:36 +0200)
commit8b5eb5e2b5d2ddf9185e55669f22ea87d28f4e90
treed185732027a3d02a4156a65ef2bc5d7af566f732
parentce80075470f6328e487389262c95af092d421ffc
drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection

This patch adds support to detect ICL, slice, subslice and EU fuse
settings.

Add addresses for ICL 11 slice, subslice and EU fuses registers.
These register addresses are the same as previous platforms but the
format and / or the meaning of the information is different. Therefore
Gen11 defines for these registers are added.

Bspec: 9731
Bspec: 20643
Bspec: 20673

v2: Update fusing information storage after introducing the new query
    uAPI (Lionel)

v3 (Oscar):
  - The maximum number of slices in ICL 11 is 1
  - The subslice disable fuse can potentially store information in
    all bits
  - GEN_MAX_SUBSLICES has to be increased to 8
  - Don't trust the slice enabled fuse outside the max number of
    expected slices
  - Indentation fix and some reordering and renaming of local
    variables

v4: Use single space after Cc tag

Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Kelvin Gardiner <kelvin.gardiner@intel.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1521575121-9577-1-git-send-email-oscar.mateo@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_device_info.c
drivers/gpu/drm/i915/intel_device_info.h