projects / openwrt / staging / blogic.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 77acd1c) | patch
drm/amd/display: Raise dispclk value for Polaris
authorRoman Li <Roman.Li@amd.com>
Tue, 20 Nov 2018 21:50:29 +0000 (16:50 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 18 Dec 2018 22:39:35 +0000 (17:39 -0500)
commit8cd61c313d8b5a813a38b615796ea50563f3afae
tree086f1a054bac5aafbe638d8e241b1b9a44fc73cdtree | snapshot
parent77acd1cd912987ffd62dad6a09275a1fb406f0c2commit | diff
drm/amd/display: Raise dispclk value for Polaris

[Why]
The visual corruption due to low display clock value observed on some
systems

[How]
There was earlier patch for dspclk:
'drm/amd/display: Raise dispclk value for dce_update_clocks'
Adding +15% workaround also to to dce112_update_clocks

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Leo Li <Sunpeng.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c diff | blob | history
John Crispins staging tree