dmaengine: xilinx_vdma: Use readl_poll_timeout instead of do while loop's

dmaengine: xilinx_vdma: Use readl_poll_timeout instead of do while loop's

It is sometimes necessary to poll a memory-mapped register until its
value satisfies some condition use convenience macros
that do this instead of do while loop's.

This patch updates the same in the driver.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>