drm/amd/display: program display clock on cache match
authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Thu, 26 Jul 2018 16:17:58 +0000 (12:17 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 6 Aug 2018 20:57:12 +0000 (15:57 -0500)
commit99326ee3624b90d176a8f7e2aa3d15dfaa59c8f1
tree196c5a5e9f74507695ae88e441e9546d56ae61b7
parentfb7b11e1633e50b9a6b3fffe5cd151474aee9802
drm/amd/display: program display clock on cache match

[Why]
We seem to have an issue where high enough display clock
will not get set properly during S3 resume if we only
call vbios once

[How]
Expand condition of display clock programming to happen
even when cached display clock matches requested display
clock

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c