powerpc/64s: make PACA_IRQ_HARD_DIS track MSR[EE] closely
authorNicholas Piggin <npiggin@gmail.com>
Sun, 3 Jun 2018 12:24:32 +0000 (22:24 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Tue, 24 Jul 2018 12:03:14 +0000 (22:03 +1000)
commit9b81c0211c249c1bc8caec2ddbc86e36c550ce0f
treed958dd35a17709ee2a6de59061d82410bea307e3
parent29e8131cd77ae49750e7e2f9f596afa5812435f2
powerpc/64s: make PACA_IRQ_HARD_DIS track MSR[EE] closely

When the masked interrupt handler clears MSR[EE] for an interrupt in
the PACA_IRQ_MUST_HARD_MASK set, it does not set PACA_IRQ_HARD_DIS.
This makes them get out of synch.

With that taken into account, it's only low level irq manipulation
(and interrupt entry before reconcile) where they can be out of synch.
This makes the code less surprising.

It also allows the IRQ replay code to rely on the IRQ_HARD_DIS value
and not have to mtmsrd again in this case (e.g., for an external
interrupt that has been masked). The bigger benefit might just be
that there is not such an element of surprise in these two bits of
state.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/hw_irq.h
arch/powerpc/kernel/entry_64.S
arch/powerpc/kernel/exceptions-64e.S
arch/powerpc/kernel/exceptions-64s.S
arch/powerpc/kernel/idle_book3e.S
arch/powerpc/kernel/irq.c