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(parent: eced1df) | patch
perf_counter/powerpc: Fix cache event codes for POWER7
authorPaul Mackerras <paulus@samba.org>
Thu, 3 Sep 2009 01:52:02 +0000 (11:52 +1000)
committerIngo Molnar <mingo@elte.hu>
Thu, 3 Sep 2009 06:41:53 +0000 (08:41 +0200)
commita3df6f7d3090e611bcc774cd2cba45ae016d37e1
treefd7239293b33e2d60ad6e5d7f2f2df9ef985a056tree | snapshot
parenteced1dfcfcf6b0a35e925d73916a9d8e36ab5457commit | diff
perf_counter/powerpc: Fix cache event codes for POWER7

I had the codes for L1 D-cache load accesses and misses swapped
around, and the wrong codes for LL-cache accesses and misses.
This corrects them.

Reported-by: Corey Ashford <cjashfor@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: <stable@kernel.org>
LKML-Reference: <19103.8514.709300.585484@cargo.ozlabs.ibm.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/powerpc/kernel/power7-pmu.c diff | blob | history
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