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(parent: 55de0f3) | patch
clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks
authorIcenowy Zheng <icenowy@aosc.io>
Fri, 16 Mar 2018 14:02:11 +0000 (22:02 +0800)
committerMaxime Ripard <maxime.ripard@bootlin.com>
Sun, 18 Mar 2018 20:16:54 +0000 (21:16 +0100)
commita910f251ee084230e2f8d214f1621346cec94e69
tree0d6f3659b49faa55ca3b4af6a8f07f0bf52ed4adtree | snapshot
parent55de0f31df1a31b346edfe98d061f11162ff1ad4commit | diff
clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks

On the new Allwinner H6 SoC, multiple PLL's are NMP style clocks
(modelled as NKMP with no K) and have fixed post-dividers.

Add fixed post divider support to the NKMP style clocks.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
drivers/clk/sunxi-ng/ccu_nkmp.c diff | blob | history
drivers/clk/sunxi-ng/ccu_nkmp.h diff | blob | history
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