drm/i915/icl: Implement half float formats
authorKevin Strasser <kevin.strasser@intel.com>
Wed, 13 Mar 2019 00:38:32 +0000 (17:38 -0700)
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Wed, 13 Mar 2019 10:23:12 +0000 (11:23 +0100)
commita94bed60cb73962f344ead14b2ee7613280432c6
tree9be25a11fac9392278049d3105f3ccb32dbbe8b1
parent42fd20edf68cd5d8ee13d653f6d44e36dcb60802
drm/i915/icl: Implement half float formats

64 bpp half float formats are supported on hdr planes only and are subject
to the following restrictions:
  * 90/270 rotation not supported
  * Yf Tiling not supported
  * Frame Buffer Compression not supported
  * Color Keying not supported

v2:
- Drop handling pixel normalize register
- Don't use icl_is_hdr_plane too early

v3:
- Use refactored icl_is_hdr_plane (Ville)
- Use u32 instead of uint32_t (Ville)

v6:
- Rebase and fix merge conflicts
- Reorganize switch statements to keep RGB grouped separately from YUV

Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1552437513-22648-4-git-send-email-kevin.strasser@intel.com
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_sprite.c