projects / openwrt / staging / blogic.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 58de9b8) | patch
clk: st: STiH407: Support for clockgenA9
authorGabriel FERNANDEZ <gabriel.fernandez@st.com>
Tue, 15 Jul 2014 15:20:29 +0000 (17:20 +0200)
committerMike Turquette <mturquette@linaro.org>
Tue, 29 Jul 2014 05:37:04 +0000 (22:37 -0700)
commitaaa65d7777b70529c5caef07299861824836859d
treec4c4fb11df5c5a481dd658516ec9cad9952475eatree | snapshot
parent58de9b8e7fd463ad89dcc2c38f4c95f932d6797dcommit | diff
clk: st: STiH407: Support for clockgenA9

The patch added support for DT registration of ClockGenA9
It includes c32 type PLL.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/st/clkgen-pll.c diff | blob | history
John Crispins staging tree