projects / openwrt / staging / blogic.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 4588b58) | patch
MIPS: Alchemy: Fix db1200 PSC clock enablement
authorManuel Lauss <manuel.lauss@gmail.com>
Mon, 18 Aug 2014 15:10:32 +0000 (17:10 +0200)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 26 Aug 2014 00:18:53 +0000 (02:18 +0200)
commitc6c7d7c343d97720f4e12678f661d262dafec6f7
tree4e4a2088afd962f445fe2e5975ddbbecfad970fetree | snapshot
parent4588b58d95c08880d5c67ad277ba534ffb37e7bacommit | diff
MIPS: Alchemy: Fix db1200 PSC clock enablement

Enable PSC0 (I2C/SPI) clock and leave PSC1 (Audio) alone.  This patch
restores functionality to both Audio and I2C/SPI.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7544/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/alchemy/devboards/db1200.c diff | blob | history
John Crispins staging tree