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(parent: 92e963f) | patch
dmaengine: dw: fix a typo for bitfields of CTL_LO
authorJie Yang <yang.jie@intel.com>
Thu, 7 Jan 2016 00:39:33 +0000 (08:39 +0800)
committerVinod Koul <vinod.koul@intel.com>
Mon, 25 Jan 2016 04:19:55 +0000 (09:49 +0530)
commitc9784a467380dfbd8070c735e651af07331172d9
treee531babe0b65e916b1df88698dae26e57ab77d95tree | snapshot
parent92e963f50fc74041b5e9e744c330dca48e04f08dcommit | diff
dmaengine: dw: fix a typo for bitfields of CTL_LO

The offset of SINC should be 9, not 7, here fix this
typo.

Signed-off-by: Jie Yang <yang.jie@intel.com>
Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
drivers/dma/dw/regs.h diff | blob | history
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