drm/i915/icl: Configure DSI transcoders
authorMadhav Chauhan <madhav.chauhan@intel.com>
Mon, 15 Oct 2018 14:27:59 +0000 (17:27 +0300)
committerJani Nikula <jani.nikula@intel.com>
Mon, 22 Oct 2018 06:45:16 +0000 (09:45 +0300)
commitd364dc66e2d5afdd825f79b70d8d81d287b2524a
treea1b8acd37da102c45c7a6edd6634f69033af0114
parent5ffce2546233e0adeb48c752e4e828acd0a4a4a0
drm/i915/icl: Configure DSI transcoders

This patch programs DSI operation mode, pixel format,
BGR info, link calibration etc for the DSI transcoder.
This patch also extract BGR info of the DSI panel from
VBT and save it inside struct intel_dsi which used for
configuring DSI transcoder.

v2: Rebase
v3: Use newly defined bitfields.

v4 by Jani:
 - Use intel_dsi_bitrate()
 - Make bgr_enabled bool
 - Use 0 instead of 0x0
 - Replace DRM_ERROR() with MISSING_CASE() on pixel format and video mode
 - Use is_vid_mode()

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7de4e39a4b2a18e53a2b9d9cea5b5b4c9d6eeb34.1539613303.git.jani.nikula@intel.com
drivers/gpu/drm/i915/icl_dsi.c
drivers/gpu/drm/i915/intel_dsi.h
drivers/gpu/drm/i915/intel_dsi_vbt.c