projects / openwrt / staging / blogic.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 44a63b1) | patch
cxgb4: fix offset in collecting TX rate limit info
authorRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Fri, 18 May 2018 13:43:37 +0000 (19:13 +0530)
committerDavid S. Miller <davem@davemloft.net>
Fri, 18 May 2018 17:54:48 +0000 (13:54 -0400)
commitd775f26b295a0a303f7a73d7da46e04296484fe7
tree6173edee4d7650284e93c23880791941a399428ftree | snapshot
parent44a63b137f7b6e4c7bd6c9cc21615941cb36509dcommit | diff
cxgb4: fix offset in collecting TX rate limit info

Correct the indirect register offsets in collecting TX rate limit info
in UP CIM logs.

Also, T5 doesn't support these indirect register offsets, so remove
them from collection logic.

Fixes: be6e36d916b1 ("cxgb4: collect TX rate limit info in UP CIM logs")
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h diff | blob | history
John Crispins staging tree