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(parent: ecfb1ad) | patch
ASoC: Optimise clock management for WM8915 Speyside
authorMark Brown <broonie@opensource.wolfsonmicro.com>
Tue, 12 Apr 2011 06:32:03 +0000 (23:32 -0700)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Wed, 13 Apr 2011 17:01:57 +0000 (10:01 -0700)
commitea0a591a28b9249ea585f2cf8045e43f57f48fbb
tree2168e570830b4526c5aaff54b9b84fead2513099tree | snapshot
parentecfb1adf5f037eaff0b678918d84a8febd9f1c3ecommit | diff
ASoC: Optimise clock management for WM8915 Speyside

Dynamically enable and disable the FLL on the WM8915, configuring the
system clock to 256fs for 48kHz when the device is active but reverting
to using the input 32.768kHz clock directly at other times to support
features such as jack detection with minimal power consumption.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-by: Liam Girdwood <lrg@ti.com>
sound/soc/samsung/speyside.c diff | blob | history
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