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author	Ilia Mirkin <imirkin@alum.mit.edu>
	Mon, 29 Jul 2013 02:30:06 +0000 (22:30 -0400)
committer	Ben Skeggs <bskeggs@redhat.com>
	Wed, 4 Sep 2013 03:46:15 +0000 (13:46 +1000)
commit	ef7d64e5c27bc2587b4a20c9ae04413ce679bd8c
tree	775522e08719e62fd1aac7695e9fbfb7380a7261	tree \| snapshot
parent	57be046e5af098ab2ff972269799ef495a7f8a2b	commit \| diff

drm/nouveau/vdec: implement support for VP3 engines

For NV98+, BSP/VP/PPP are all FUC-based engines. Hook them all up in the
same way as NVC0, but with a couple of different values. Also make sure
that the PPP engine is handled in the fifo/mc/vm.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

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drivers/gpu/drm/nouveau/core/engine/bsp/nv98.c		diff \| blob \| history
drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c		diff \| blob \| history
drivers/gpu/drm/nouveau/core/engine/ppp/nv98.c		diff \| blob \| history
drivers/gpu/drm/nouveau/core/engine/vp/nv98.c		diff \| blob \| history
drivers/gpu/drm/nouveau/core/subdev/mc/nv98.c		diff \| blob \| history
drivers/gpu/drm/nouveau/core/subdev/vm/nv50.c		diff \| blob \| history