drm/i915/bios: amend edp block based on intel_vbt_decode

Copy over some fields defined in the intel_vbt_decode tool. No
functional changes.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/8a42f0e4d1bba2679e9cd78da1e31b66133d562f.1503670197.git.jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 92e484e78ea053009a452c3bcdf3acd10d6b6781..5949750a35ee1b916193d3394d7a4df18a46e88e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -576,7 +576,7 @@ parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
 {
        const struct bdb_edp *edp;
        const struct edp_power_seq *edp_pps;
-       const struct edp_link_params *edp_link_params;
+       const struct edp_fast_link_params *edp_link_params;
        int panel_type = dev_priv->vbt.panel_type;
 
        edp = find_section(bdb, BDB_EDP);
@@ -600,7 +600,7 @@ parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
 
        /* Get the eDP sequencing and link info */
        edp_pps = &edp->power_seqs[panel_type];
-       edp_link_params = &edp->link_params[panel_type];
+       edp_link_params = &edp->fast_link_params[panel_type];
 
        dev_priv->vbt.edp.pps = *edp_pps;
 

diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 6a5d2a804d52ac5b97c1c8b35b4a3d34d4fa4fd7..404569c9fdfc6dacb63628e67fb4a81c2036b898 100644 (file)
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -688,23 +688,38 @@ struct bdb_driver_features {
 #define EDP_VSWING_1_2V                3
 
 
-struct edp_link_params {
+struct edp_fast_link_params {
        u8 rate:4;
        u8 lanes:4;
        u8 preemphasis:4;
        u8 vswing:4;
 } __packed;
 
+struct edp_pwm_delays {
+       u16 pwm_on_to_backlight_enable;
+       u16 backlight_disable_to_pwm_off;
+} __packed;
+
+struct edp_full_link_params {
+       u8 preemphasis:4;
+       u8 vswing:4;
+} __packed;
+
 struct bdb_edp {
        struct edp_power_seq power_seqs[16];
        u32 color_depth;
-       struct edp_link_params link_params[16];
+       struct edp_fast_link_params fast_link_params[16];
        u32 sdrrs_msa_timing_delay;
 
        /* ith bit indicates enabled/disabled for (i+1)th panel */
-       u16 edp_s3d_feature;
-       u16 edp_t3_optimization;
-       u64 edp_vswing_preemph;         /* v173 */
+       u16 edp_s3d_feature;                                    /* 162 */
+       u16 edp_t3_optimization;                                /* 165 */
+       u64 edp_vswing_preemph;                                 /* 173 */
+       u16 fast_link_training;                                 /* 182 */
+       u16 dpcd_600h_write_required;                           /* 185 */
+       struct edp_pwm_delays pwm_delays[16];                   /* 186 */
+       u16 full_link_params_provided;                          /* 199 */
+       struct edp_full_link_params full_link_params[16];       /* 199 */
 } __packed;
 
 struct psr_table {