arm64: zynqmp: Added clocks to DT for ep108
authorVNSL Durga <vnsl.durga.challa@xilinx.com>
Mon, 11 Apr 2016 12:13:47 +0000 (17:43 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 21 Aug 2017 12:07:35 +0000 (14:07 +0200)
Added clks for ep108 platform.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm64/boot/dts/xilinx/zynqmp-ep108-clk.dtsi

index c03bde79d7d81d11537e0ed2626cb9d18e266f47..31d25327cfb9fcce8aaa41e5a23faa74396b3f95 100644 (file)
                #clock-cells = <0>;
                clock-frequency = <75000000>;
        };
+
+       clk100: clk100 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <100000000>;
+       };
+
+       clk600: clk600 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <600000000>;
+       };
 };
 
 &can0 {
        clocks = <&misc_clk &misc_clk>;
 };
 
+&fpd_dma_chan1 {
+       clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan2 {
+       clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan3 {
+       clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan4 {
+       clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan5 {
+       clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan6 {
+       clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan7 {
+       clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan8 {
+       clocks = <&clk600>, <&clk100>;
+};
+
 &gem0 {
        clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
 };