powerpc/perf: POWER9 PMU stops after idle workaround

POWER9 DD2 PMU can stop after a state-loss idle in some conditions.

A solution is to set then clear MMCRA[60] after wake from state-loss
idle. MMCRA[60] is a non-architected bit, see the user manual for
details.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Acked-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Reviewed-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Acked-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S
index 516ebef905c063b6bdb696f5f6048da37f7822cd..e6252c5a57a4a06f10bd13710ceecdcf72c3d26e 100644 (file)
--- a/arch/powerpc/kernel/idle_book3s.S
+++ b/arch/powerpc/kernel/idle_book3s.S
@@ -460,11 +460,17 @@ pnv_restore_hyp_resource_arch300:
        /*
         * Workaround for POWER9, if we lost resources, the ERAT
         * might have been mixed up and needs flushing. We also need
-        * to reload MMCR0 (see comment above).
+        * to reload MMCR0 (see comment above). We also need to set
+        * then clear bit 60 in MMCRA to ensure the PMU starts running.
         */
        blt     cr3,1f
        PPC_INVALIDATE_ERAT
        ld      r1,PACAR1(r13)
+       mfspr   r4,SPRN_MMCRA
+       ori     r4,r4,(1 << (63-60))
+       mtspr   SPRN_MMCRA,r4
+       xori    r4,r4,(1 << (63-60))
+       mtspr   SPRN_MMCRA,r4
        ld      r4,_MMCR0(r1)
        mtspr   SPRN_MMCR0,r4
 1: