drm/amdgpu: revert "stop using gart_start as offset for the GTT domain"
authorChristian König <christian.koenig@amd.com>
Fri, 14 Sep 2018 10:54:33 +0000 (12:54 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 14 Sep 2018 15:05:42 +0000 (10:05 -0500)
Turned out the commit is incomplete and since we remove using the AGP
mapping from the GTT manager it is also not necessary any more.

This reverts commit 22d8bfafcc12dfa17b91d2e8ae4e1898e782003a.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: James Zhu <James.Zhu@amd.com>
Tested-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

index c2539f6821c03de0cfb3f87a7f7e9c84b976673e..da7b1b92d9cf86e1690ece8b97187f8d20e1a193 100644 (file)
@@ -143,8 +143,7 @@ static int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
        spin_unlock(&mgr->lock);
 
        if (!r)
-               mem->start = node->node.start +
-                       (adev->gmc.gart_start >> PAGE_SHIFT);
+               mem->start = node->node.start;
 
        return r;
 }
index 8a158ee922f73a7c82df42ff351c7d0b72a5797c..f12ae6b525b97962f632db1e5588027603e9290d 100644 (file)
@@ -188,7 +188,7 @@ static int amdgpu_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
        case TTM_PL_TT:
                /* GTT memory  */
                man->func = &amdgpu_gtt_mgr_func;
-               man->gpu_offset = 0;
+               man->gpu_offset = adev->gmc.gart_start;
                man->available_caching = TTM_PL_MASK_CACHING;
                man->default_caching = TTM_PL_FLAG_CACHED;
                man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
@@ -1060,7 +1060,7 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm,
        flags = amdgpu_ttm_tt_pte_flags(adev, ttm, bo_mem);
 
        /* bind pages into GART page tables */
-       gtt->offset = ((u64)bo_mem->start << PAGE_SHIFT) - adev->gmc.gart_start;
+       gtt->offset = (u64)bo_mem->start << PAGE_SHIFT;
        r = amdgpu_gart_bind(adev, gtt->offset, ttm->num_pages,
                ttm->pages, gtt->ttm.dma_address, flags);
 
@@ -1112,8 +1112,7 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo)
                flags = amdgpu_ttm_tt_pte_flags(adev, bo->ttm, &tmp);
 
                /* Bind pages */
-               gtt->offset = ((u64)tmp.start << PAGE_SHIFT) -
-                       adev->gmc.gart_start;
+               gtt->offset = (u64)tmp.start << PAGE_SHIFT;
                r = amdgpu_ttm_gart_bind(adev, bo, flags);
                if (unlikely(r)) {
                        ttm_bo_mem_put(bo, &tmp);