arm64: dts: mt7622: add usb device nodes

add xhci node and usb3 phy nodes

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Tested-by: Jumin Li <jumin.li@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
index 6715ffa5c15e12aadf7fd1d62e77f7f9e973f25f..cc89e2e3c59756162f6b7f17c4984e6fbf68b498 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -52,6 +52,24 @@
        memory {
                reg = <0 0x40000000 0 0x3F000000>;
        };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_5v: regulator-5v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-5V";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
 };
 
 &pcie {
@@ -343,6 +361,16 @@
        status = "okay";
 };
 
+&ssusb {
+       vusb33-supply = <&reg_3p3v>;
+       vbus-supply = <&reg_5v>;
+       status = "okay";
+};
+
+&u3phy {
+       status = "okay";
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pins>;

diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index e6ead5049a7a7ad24c4fd5828d3c4006e69897ad..8cff67d70582b84796d321263f47e9768eb4831c 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -535,6 +535,57 @@
                #reset-cells = <1>;
        };
 
+       ssusb: usb@1a0c0000 {
+               compatible = "mediatek,mt7622-xhci",
+                            "mediatek,mtk-xhci";
+               reg = <0 0x1a0c0000 0 0x01000>,
+                     <0 0x1a0c4700 0 0x0100>;
+               reg-names = "mac", "ippc";
+               interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_LOW>;
+               power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF1>;
+               clocks = <&ssusbsys CLK_SSUSB_SYS_EN>,
+                        <&ssusbsys CLK_SSUSB_REF_EN>,
+                        <&ssusbsys CLK_SSUSB_MCU_EN>,
+                        <&ssusbsys CLK_SSUSB_DMA_EN>;
+               clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+               phys = <&u2port0 PHY_TYPE_USB2>,
+                      <&u3port0 PHY_TYPE_USB3>,
+                      <&u2port1 PHY_TYPE_USB2>;
+
+               status = "disabled";
+       };
+
+       u3phy: usb-phy@1a0c4000 {
+               compatible = "mediatek,mt7622-u3phy",
+                            "mediatek,generic-tphy-v1";
+               reg = <0 0x1a0c4000 0 0x700>;
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+               status = "disabled";
+
+               u2port0: usb-phy@1a0c4800 {
+                       reg = <0 0x1a0c4800 0 0x0100>;
+                       #phy-cells = <1>;
+                       clocks = <&ssusbsys CLK_SSUSB_U2_PHY_EN>;
+                       clock-names = "ref";
+               };
+
+               u3port0: usb-phy@1a0c4900 {
+                       reg = <0 0x1a0c4900 0 0x0700>;
+                       #phy-cells = <1>;
+                       clocks = <&clk25m>;
+                       clock-names = "ref";
+               };
+
+               u2port1: usb-phy@1a0c5000 {
+                       reg = <0 0x1a0c5000 0 0x0100>;
+                       #phy-cells = <1>;
+                       clocks = <&ssusbsys CLK_SSUSB_U2_PHY_1P_EN>;
+                       clock-names = "ref";
+               };
+       };
+
        pciesys: pciesys@1a100800 {
                compatible = "mediatek,mt7622-pciesys",
                             "syscon";