;;
dlink,dsm-g600-a|\
iom,nas-100d|\
-linksys,nslu2)
+linksys,nslu2|\
+netgear,wg302v1)
ucidef_set_interface_lan "eth0" "dhcp"
;;
usr,usr8200)
endef
TARGET_DEVICES += linksys_nslu2
+define Device/netgear_wg302v1
+ DEVICE_VENDOR := Netgear
+ DEVICE_MODEL := WG302 v1
+ DEVICE_PACKAGES := ixp4xx-microcode-ethernet kmod-phy-amd kmod-ath5k \
+ wpad-basic-mbedtls kmod-input-gpio-keys-polled
+ # Only 32 MB of RAM and small flash so not building by default
+ DEFAULT := n
+ DEVICE_DTS := intel-ixp42x-netgear-wg302v1
+ KERNEL := kernel-bin | append-dtb
+ IMAGES := kernel.bin rootfs.bin
+ IMAGE/kernel.bin := append-kernel
+ IMAGE/rootfs.bin := append-rootfs | pad-rootfs | pad-to 128k
+endef
+TARGET_DEVICES += netgear_wg302v1
+
define Device/usrobotics_usr8200
DEVICE_VENDOR := USRobotics
DEVICE_MODEL := USR8200
--- /dev/null
+From ed23e07bf7a1896b6eaa85b773bb43b1fad66d4b Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Sat, 21 Dec 2024 00:07:11 +0100
+Subject: [PATCH] ARM: dts: ixp4xx: Fix up PCI on WG302
+
+Looking at the board file for WG302 v2 was not a good idea
+because the GPIO IRQ for slot 2 differs, and v1 uses GPIO
+10 instead of GPIO 9. Fix it up.
+
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+ .../dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+--- a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts
++++ b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts
+@@ -57,7 +57,7 @@
+ status = "okay";
+
+ /*
+- * Taken from WG302 v2 PCI boardfile (wg302v2-pci.c)
++ * Taken from WG302 v1 PCI boardfile (wg302v1-pci.c)
+ * We have slots (IDSEL) 1 and 2 with one assigned IRQ
+ * each handling all IRQs.
+ */
+@@ -70,10 +70,10 @@
+ <0x0800 0 0 3 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 8 */
+ <0x0800 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 8 */
+ /* IDSEL 2 */
+- <0x1000 0 0 1 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 9 */
+- <0x1000 0 0 2 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 9 */
+- <0x1000 0 0 3 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 9 */
+- <0x1000 0 0 4 &gpio0 9 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 2 is irq 9 */
++ <0x1000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 10 */
++ <0x1000 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 10 */
++ <0x1000 0 0 3 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 10 */
++ <0x1000 0 0 4 &gpio0 10 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 2 is irq 10 */
+ };
+
+ ethernet@c8009000 {
--- /dev/null
+From 1d22f422fca8875f6d2cb297f735d41fd5830000 Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Mon, 23 Dec 2024 17:50:52 +0100
+Subject: [PATCH] ARM: dts: ixp4xx: Add Netgear WG302 v1 GPIOs
+
+This adds GPIO LED indicators, the reset GPIO RESET
+button on the Netgear WG302 v1 to the device tree.
+
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+ .../ixp/intel-ixp42x-netgear-wg302v1.dts | 30 +++++++++++++++++++
+ 1 file changed, 30 insertions(+)
+
+--- a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts
++++ b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-netgear-wg302v1.dts
+@@ -8,6 +8,7 @@
+
+ #include "intel-ixp42x.dtsi"
+ #include <dt-bindings/input/input.h>
++#include <dt-bindings/leds/common.h>
+
+ / {
+ model = "Netgear WG302 v1";
+@@ -32,6 +33,35 @@
+ serial0 = &uart1;
+ };
+
++ leds {
++ compatible = "gpio-leds";
++ test_led: led-test {
++ color = <LED_COLOR_ID_AMBER>;
++ function = "test";
++ gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
++ default-state = "off";
++ };
++ wlan_led: led-wlan {
++ color = <LED_COLOR_ID_GREEN>;
++ function = LED_FUNCTION_WLAN;
++ gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
++ default-state = "off";
++ linux,default-trigger = "phy0tx";
++ };
++ };
++
++ gpio_keys {
++ /* RESET is on GPIO13 which can't fire interrupts */
++ compatible = "gpio-keys-polled";
++ poll-interval = <100>;
++
++ button-reset {
++ linux,code = <KEY_RESTART>;
++ label = "reset";
++ gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
++ };
++ };
++
+ soc {
+ bus@c4000000 {
+ flash@0,0 {