drm/pl111: Use 64-bit arithmetic instead of 32-bit

Add suffix ULL to constant 1000 in order to give the compiler complete
information about the proper arithmetic to use.

Notice that such constant is used in a context that expects an
expression of type u64 (64 bits, unsigned) and the following
expression is currently being evaluated using 32-bit arithmetic:

mode->clock * 1000

Addresses-Coverity-ID: 1466139 ("Unintentional integer overflow")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20180704142255.GA8614@embeddedor.com

diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c
index a432eb7ad44549bd02cba0f0b60b52bd86765f81..754f6b25f2652ee83e578c1a6786190eb554e70f 100644 (file)
--- a/drivers/gpu/drm/pl111/pl111_display.c
+++ b/drivers/gpu/drm/pl111/pl111_display.c
@@ -63,7 +63,7 @@ pl111_mode_valid(struct drm_crtc *crtc,
         * We use the pixelclock to also account for interlaced modes, the
         * resulting bandwidth is in bytes per second.
         */
-       bw = mode->clock * 1000; /* In Hz */
+       bw = mode->clock * 1000ULL; /* In Hz */
        bw = bw * mode->hdisplay * mode->vdisplay * cpp;
        bw = div_u64(bw, mode->htotal * mode->vtotal);