drm/i915: stick to kernel fixed size types
authorJani Nikula <jani.nikula@intel.com>
Mon, 18 Mar 2019 16:00:19 +0000 (18:00 +0200)
committerJani Nikula <jani.nikula@intel.com>
Tue, 19 Mar 2019 07:49:07 +0000 (09:49 +0200)
We no longer allow mixed C99 and kernel types, and the preference is to
use kernel types exclusively. Fix the C99 types that have crept in since
the mass conversion. No functional changes.

Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Kevin Strasser <kevin.strasser@intel.com>
Cc: Ramalingam C <ramalingam.c@intel.com>
Cc: Swati Sharma <swati2.sharma@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318160019.9309-1-jani.nikula@intel.com
drivers/gpu/drm/i915/intel_hdmi.c
drivers/gpu/drm/i915/intel_pipe_crc.c
drivers/gpu/drm/i915/intel_sprite.c

index ecfec5d3292e0aa9117eacf1345417e29741fe82..07893ad2ad1f93c0c56e07a1bf69def94adfc349 100644 (file)
@@ -1492,7 +1492,7 @@ static struct hdcp2_hdmi_msg_data {
 
 static
 int intel_hdmi_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
-                                   uint8_t *rx_status)
+                                   u8 *rx_status)
 {
        return intel_hdmi_hdcp_read(intel_dig_port,
                                    HDCP_2_2_HDMI_REG_RXSTATUS_OFFSET,
index 64a98712d61fae6aeafb2ffa2fb92a31af336924..0b1378f0bff76aaf0597dea0f736502d2cbec465 100644 (file)
@@ -363,7 +363,7 @@ static int ivb_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
 static int skl_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
                                enum pipe pipe,
                                enum intel_pipe_crc_source *source,
-                               uint32_t *val)
+                               u32 *val)
 {
        if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)
                *source = INTEL_PIPE_CRC_SOURCE_PIPE;
index 268fb34ff0e21982c2f61b322351c48556580ec7..aee4defcb88dbade75c4480cd455270c2b7d4bdf 100644 (file)
@@ -1821,7 +1821,7 @@ static const u32 skl_plane_formats[] = {
        DRM_FORMAT_VYUY,
 };
 
-static const uint32_t icl_plane_formats[] = {
+static const u32 icl_plane_formats[] = {
        DRM_FORMAT_C8,
        DRM_FORMAT_RGB565,
        DRM_FORMAT_XRGB8888,
@@ -1842,7 +1842,7 @@ static const uint32_t icl_plane_formats[] = {
        DRM_FORMAT_Y416,
 };
 
-static const uint32_t icl_hdr_plane_formats[] = {
+static const u32 icl_hdr_plane_formats[] = {
        DRM_FORMAT_C8,
        DRM_FORMAT_RGB565,
        DRM_FORMAT_XRGB8888,
@@ -1883,7 +1883,7 @@ static const u32 skl_planar_formats[] = {
        DRM_FORMAT_NV12,
 };
 
-static const uint32_t glk_planar_formats[] = {
+static const u32 glk_planar_formats[] = {
        DRM_FORMAT_C8,
        DRM_FORMAT_RGB565,
        DRM_FORMAT_XRGB8888,
@@ -1902,7 +1902,7 @@ static const uint32_t glk_planar_formats[] = {
        DRM_FORMAT_P016,
 };
 
-static const uint32_t icl_planar_formats[] = {
+static const u32 icl_planar_formats[] = {
        DRM_FORMAT_C8,
        DRM_FORMAT_RGB565,
        DRM_FORMAT_XRGB8888,
@@ -1927,7 +1927,7 @@ static const uint32_t icl_planar_formats[] = {
        DRM_FORMAT_Y416,
 };
 
-static const uint32_t icl_hdr_planar_formats[] = {
+static const u32 icl_hdr_planar_formats[] = {
        DRM_FORMAT_C8,
        DRM_FORMAT_RGB565,
        DRM_FORMAT_XRGB8888,