drm/i915/bdw: Expand FADD to 64bit
authorBen Widawsky <benjamin.widawsky@intel.com>
Tue, 1 Apr 2014 23:31:07 +0000 (16:31 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 2 Apr 2014 07:21:44 +0000 (09:21 +0200)
For error state, like the recent modification to ACTHD, FADD also gets
an upper dword. This is useful for debug to make sure the fetch address
and head are similar.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gpu_error.c
drivers/gpu/drm/i915/i915_reg.h

index 508bc86b08a1b10c8235ffb1b6aaa4230a859e03..0c10b7bd0727b5d2013809bd512a460111c0edef 100644 (file)
@@ -359,7 +359,7 @@ struct drm_i915_error_state {
                u64 bbaddr;
                u64 acthd;
                u32 fault_reg;
-               u32 faddr;
+               u64 faddr;
                u32 rc_psmi; /* sleep state */
                u32 semaphore_mboxes[I915_NUM_RINGS - 1];
 
index 12f1d43b2d68fbf28f8f0aeeb2ec6c727825eb88..1005af020a8e5261279deb022208dc8e8b965ada 100644 (file)
@@ -257,7 +257,8 @@ static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
                err_printf(m, "  INSTPS: 0x%08x\n", ring->instps);
        }
        err_printf(m, "  INSTPM: 0x%08x\n", ring->instpm);
-       err_printf(m, "  FADDR: 0x%08x\n", ring->faddr);
+       err_printf(m, "  FADDR: 0x%08x %08x\n", upper_32_bits(ring->faddr),
+                  lower_32_bits(ring->faddr));
        if (INTEL_INFO(dev)->gen >= 6) {
                err_printf(m, "  RC PSMI: 0x%08x\n", ring->rc_psmi);
                err_printf(m, "  FAULT_REG: 0x%08x\n", ring->fault_reg);
@@ -781,8 +782,10 @@ static void i915_record_ring_state(struct drm_device *dev,
                ering->instdone = I915_READ(RING_INSTDONE(ring->mmio_base));
                ering->instps = I915_READ(RING_INSTPS(ring->mmio_base));
                ering->bbaddr = I915_READ(RING_BBADDR(ring->mmio_base));
-               if (INTEL_INFO(dev)->gen >= 8)
+               if (INTEL_INFO(dev)->gen >= 8) {
+                       ering->faddr |= (u64) I915_READ(RING_DMA_FADD_UDW(ring->mmio_base)) << 32;
                        ering->bbaddr |= (u64) I915_READ(RING_BBADDR_UDW(ring->mmio_base)) << 32;
+               }
                ering->bbstate = I915_READ(RING_BBSTATE(ring->mmio_base));
        } else {
                ering->faddr = I915_READ(DMA_FADD_I8XX);
index 1f927a53fe1963de573ddcf6e4933a25399a187b..393f93ecd41ae23d80e2cea2e8b538ff600c970f 100644 (file)
@@ -835,6 +835,7 @@ enum punit_power_well {
 #define RING_INSTDONE(base)    ((base)+0x6c)
 #define RING_INSTPS(base)      ((base)+0x70)
 #define RING_DMA_FADD(base)    ((base)+0x78)
+#define RING_DMA_FADD_UDW(base)        ((base)+0x60) /* gen8+ */
 #define RING_INSTPM(base)      ((base)+0xc0)
 #define RING_MI_MODE(base)     ((base)+0x9c)
 #define INSTPS         0x02070 /* 965+ only */