drm/i915: Add thread stall DOP clock gating workaround on Broadwell.
authorKenneth Graunke <kenneth@whitecape.org>
Thu, 27 Feb 2014 07:59:31 +0000 (23:59 -0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 5 Mar 2014 20:30:29 +0000 (21:30 +0100)
Ben and I believe this will be necessary on production hardware.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
[danvet: Shuffle lines to group all ROW_CHICKEN writes and add a
cautious comment that this might not be needed on production hw.]
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_pm.c

index d575baf52d5482011a86bfe8880bfdc14a199d98..aa8390978e636675fad5d3907fdf238eba7f1327 100644 (file)
 
 #define GEN8_ROW_CHICKEN               0xe4f0
 #define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE        (1<<8)
+#define   STALL_DOP_GATING_DISABLE             (1<<5)
 
 #define GEN7_ROW_CHICKEN2              0xe4f4
 #define GEN7_ROW_CHICKEN2_GT2          0xf4f4
index f21c9f3ee643067b16a1b6be945a64f1434c3ed6..bb2ca355c1b051bb9b66237963916efa0baca5e3 100644 (file)
@@ -4805,6 +4805,11 @@ static void gen8_init_clock_gating(struct drm_device *dev)
        I915_WRITE(GEN8_ROW_CHICKEN,
                   _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE));
 
+       /* WaDisableThreadStallDopClockGating:bdw */
+       /* FIXME: Unclear whether we really need this on production bdw. */
+       I915_WRITE(GEN8_ROW_CHICKEN,
+                  _MASKED_BIT_ENABLE(STALL_DOP_GATING_DISABLE));
+
        /*
         * This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for
         * pre-production hardware