drm/i915: Pass dev_priv to i915_pineview_get_mem_freq() and i915_ironlake_get_mem_freq()
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 31 Oct 2016 20:37:16 +0000 (22:37 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 1 Nov 2016 14:40:38 +0000 (16:40 +0200)
Unify our approach to things by passing around dev_priv instead of dev.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1477946245-14134-18-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/gpu/drm/i915/intel_pm.c

index 11bbc35a4c840097733d7fd052f4623730f1145f..d423fc8661a9082b69092a81bf8649b85fbd25de 100644 (file)
@@ -108,9 +108,8 @@ static void bxt_init_clock_gating(struct drm_device *dev)
                           PWM1_GATING_DIS | PWM2_GATING_DIS);
 }
 
-static void i915_pineview_get_mem_freq(struct drm_device *dev)
+static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = to_i915(dev);
        u32 tmp;
 
        tmp = I915_READ(CLKCFG);
@@ -147,9 +146,8 @@ static void i915_pineview_get_mem_freq(struct drm_device *dev)
        dev_priv->is_ddr3 = (tmp & CSHRDDR3CTL_DDR3) ? 1 : 0;
 }
 
-static void i915_ironlake_get_mem_freq(struct drm_device *dev)
+static void i915_ironlake_get_mem_freq(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = to_i915(dev);
        u16 ddrpll, csipll;
 
        ddrpll = I915_READ16(DDRMPLL1);
@@ -7744,9 +7742,9 @@ void intel_init_pm(struct drm_device *dev)
 
        /* For cxsr */
        if (IS_PINEVIEW(dev_priv))
-               i915_pineview_get_mem_freq(dev);
+               i915_pineview_get_mem_freq(dev_priv);
        else if (IS_GEN5(dev_priv))
-               i915_ironlake_get_mem_freq(dev);
+               i915_ironlake_get_mem_freq(dev_priv);
 
        /* For FIFO watermark updates */
        if (INTEL_INFO(dev)->gen >= 9) {