drm/amd/display: add diags clock programming
authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Tue, 13 Feb 2018 19:41:51 +0000 (14:41 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 5 Mar 2018 20:34:40 +0000 (15:34 -0500)
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/dm_helpers.h
drivers/gpu/drm/amd/display/dc/inc/core_types.h

index 3e157e65d7cd571d0704579628a4299bfddd4890..9ab69b22b989e57408d7c2c791b819603a35f2bf 100644 (file)
@@ -505,3 +505,8 @@ enum dc_edid_status dm_helpers_read_local_edid(
 
        return edid_status;
 }
+
+void dm_set_dcn_clocks(struct dc_context *ctx, struct dc_clocks *clks)
+{
+       /* TODO: something */
+}
index a6402c651251aeb6619c235557099e378f36085d..14cc4beb12c14d3954deb4e5b99fa3f01ad0415a 100644 (file)
@@ -184,6 +184,17 @@ enum wm_report_mode {
        WM_REPORT_OVERRIDE = 1,
 };
 
+struct dc_clocks {
+       int dispclk_khz;
+       int max_dppclk_khz;
+       int dcfclk_khz;
+       int socclk_khz;
+       int dcfclk_deep_sleep_khz;
+       int fclk_khz;
+       int dram_ccm_us;
+       int min_active_dram_ccm_us;
+};
+
 struct dc_debug {
        bool surface_visual_confirm;
        bool sanity_checks;
index 53d5566f89b89a0b40eac9b6a02b522b2d3c0da5..034369fbb9e2cb5e5f0eb95931fb7b9e9ddafdfb 100644 (file)
@@ -108,5 +108,8 @@ enum dc_edid_status dm_helpers_read_local_edid(
                struct dc_link *link,
                struct dc_sink *sink);
 
+void dm_set_dcn_clocks(
+               struct dc_context *ctx,
+               struct dc_clocks *clks);
 
 #endif /* __DM_HELPERS__ */
index a9b21a4a0c170a5ee51d5c2896f715f24bb9ac55..b8f05384a897883572b3e8c394bbe28937f20dd3 100644 (file)
@@ -256,20 +256,9 @@ struct dce_bw_output {
        int blackout_recovery_time_us;
 };
 
-struct dcn_bw_clocks {
-       int dispclk_khz;
-       int max_dppclk_khz;
-       int dcfclk_khz;
-       int socclk_khz;
-       int dcfclk_deep_sleep_khz;
-       int fclk_khz;
-       int dram_ccm_us;
-       int min_active_dram_ccm_us;
-};
-
 struct dcn_bw_output {
-       struct dcn_bw_clocks cur_clk;
-       struct dcn_bw_clocks calc_clk;
+       struct dc_clocks cur_clk;
+       struct dc_clocks calc_clk;
        struct dcn_watermark_set watermarks;
 };