drm/i915: Fix the kernel panic when using aliasing ppgtt
authorChuanxiao Dong <chuanxiao.dong@intel.com>
Fri, 7 Jul 2017 09:50:59 +0000 (17:50 +0800)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 7 Jul 2017 10:05:53 +0000 (11:05 +0100)
The ppgtt should be get directly from i915_address_space *vm instead of
vma->vm.

v2:
- add one more fix for bxt. (Chris)

Fixes: 4a234c5fae16 ("drm/i915: pass the vma to insert_entries")
Bugzilla:https://bugs.freedesktop.org/show_bug.cgi?id=101713
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com> v1
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1499421059-18262-1-git-send-email-chuanxiao.dong@intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/gpu/drm/i915/i915_gem_gtt.c

index de67084d5fcf55b6389f5c832e81dcb981c4385e..10aa7762d9a63c440a845509c08acd05849bb28b 100644 (file)
@@ -910,7 +910,7 @@ static void gen8_ppgtt_insert_3lvl(struct i915_address_space *vm,
                                   enum i915_cache_level cache_level,
                                   u32 unused)
 {
-       struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vma->vm);
+       struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
        struct sgt_dma iter = {
                .sg = vma->pages->sgl,
                .dma = sg_dma_address(iter.sg),
@@ -2242,7 +2242,7 @@ static void bxt_vtd_ggtt_insert_entries__BKL(struct i915_address_space *vm,
                                             enum i915_cache_level level,
                                             u32 unused)
 {
-       struct insert_entries arg = { vma->vm, vma, level };
+       struct insert_entries arg = { vm, vma, level };
 
        stop_machine(bxt_vtd_ggtt_insert_entries__cb, &arg, NULL);
 }