ARM: dts: uniphier: change MIO node to SD control node

I made a mistake bacuse the Media I/O block is not implemented in
these SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi
index 2c49c3614bda53ddbea05c8157009a932623253e..5357ea9c14b1ed59944f137b228ba3c4996910c7 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro5.dtsi
@@ -184,11 +184,11 @@
 };
 
 &mio_clk {
-       compatible = "socionext,uniphier-pro5-mio-clock";
+       compatible = "socionext,uniphier-pro5-sd-clock";
 };
 
 &mio_rst {
-       compatible = "socionext,uniphier-pro5-mio-reset";
+       compatible = "socionext,uniphier-pro5-sd-reset";
 };
 
 &peri_clk {

diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 8789cd518933dbaf1564e0e333867fdc4f73d6e4..950f07ba03371ef102289238a48c008a40bb8b86 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -197,11 +197,11 @@
 };
 
 &mio_clk {
-       compatible = "socionext,uniphier-pxs2-mio-clock";
+       compatible = "socionext,uniphier-pxs2-sd-clock";
 };
 
 &mio_rst {
-       compatible = "socionext,uniphier-pxs2-mio-reset";
+       compatible = "socionext,uniphier-pxs2-sd-reset";
 };
 
 &peri_clk {