};
};
+ tempmon: tempmon {
+ compatible = "fsl,imx6q-tempmon";
+ interrupt-parent = <&gpc>;
+ interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,tempmon = <&anatop>;
+ fsl,tempmon-data = <&ocotp>;
+ clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
+ };
+
+ ldb: ldb {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
+ gpr = <&gpr>;
+ status = "disabled";
+
+ lvds-channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ status = "disabled";
+
+ port@0 {
+ reg = <0>;
+
+ lvds0_mux_0: endpoint {
+ remote-endpoint = <&ipu1_di0_lvds0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ lvds0_mux_1: endpoint {
+ remote-endpoint = <&ipu1_di1_lvds0>;
+ };
+ };
+ };
+
+ lvds-channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ status = "disabled";
+
+ port@0 {
+ reg = <0>;
+
+ lvds1_mux_0: endpoint {
+ remote-endpoint = <&ipu1_di0_lvds1>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ lvds1_mux_1: endpoint {
+ remote-endpoint = <&ipu1_di1_lvds1>;
+ };
+ };
+ };
+ };
+
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupt-parent = <&gpc>;
+ interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
};
- pmu {
- compatible = "arm,cortex-a9-pmu";
- interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
- };
-
aips-bus@2000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
};
};
- tempmon: tempmon {
- compatible = "fsl,imx6q-tempmon";
- interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
- fsl,tempmon = <&anatop>;
- fsl,tempmon-data = <&ocotp>;
- clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
- };
-
usbphy1: usbphy@20c9000 {
compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
reg = <0x020c9000 0x1000>;
reg = <0x20e0000 0x4000>;
};
- ldb: ldb {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
- gpr = <&gpr>;
- status = "disabled";
-
- lvds-channel@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- status = "disabled";
-
- port@0 {
- reg = <0>;
-
- lvds0_mux_0: endpoint {
- remote-endpoint = <&ipu1_di0_lvds0>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- lvds0_mux_1: endpoint {
- remote-endpoint = <&ipu1_di1_lvds0>;
- };
- };
- };
-
- lvds-channel@1 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
- status = "disabled";
-
- port@0 {
- reg = <0>;
-
- lvds1_mux_0: endpoint {
- remote-endpoint = <&ipu1_di0_lvds1>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- lvds1_mux_1: endpoint {
- remote-endpoint = <&ipu1_di1_lvds1>;
- };
- };
- };
- };
-
dcic1: dcic@20e4000 {
reg = <0x020e4000 0x4000>;
interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
};
};
+ tempmon: tempmon {
+ compatible = "fsl,imx6q-tempmon";
+ interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&gpc>;
+ fsl,tempmon = <&anatop>;
+ fsl,tempmon-data = <&ocotp>;
+ clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
+ };
+
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupt-parent = <&gpc>;
+ interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;
arm,data-latency = <4 2 3>;
};
- pmu {
- compatible = "arm,cortex-a9-pmu";
- interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
- };
-
aips1: aips-bus@2000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
};
};
- tempmon: tempmon {
- compatible = "fsl,imx6q-tempmon";
- interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
- fsl,tempmon = <&anatop>;
- fsl,tempmon-data = <&ocotp>;
- clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
- };
-
usbphy1: usbphy@20c9000 {
compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy";
reg = <0x020c9000 0x1000>;
};
};
+ tempmon: tempmon {
+ compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon";
+ interrupt-parent = <&gpc>;
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,tempmon = <&anatop>;
+ nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
+ nvmem-cell-names = "calib", "temp_grade";
+ clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
+ };
+
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupt-parent = <&gpc>;
+ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gpc>;
ranges;
- pmu {
- compatible = "arm,cortex-a9-pmu";
- interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
- };
-
ocram: sram@900000 {
compatible = "mmio-sram";
reg = <0x00900000 0x20000>;
};
};
- tempmon: tempmon {
- compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon";
- interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
- fsl,tempmon = <&anatop>;
- nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
- nvmem-cell-names = "calib", "temp_grade";
- clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
- };
-
usbphy1: usbphy@20c9000 {
compatible = "fsl,imx6sx-usbphy", "fsl,imx23-usbphy";
reg = <0x020c9000 0x1000>;
clock-output-names = "ipp_di1";
};
+ tempmon: tempmon {
+ compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
+ interrupt-parent = <&gpc>;
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,tempmon = <&anatop>;
+ nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
+ nvmem-cell-names = "calib", "temp_grade";
+ clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
+ };
+
+ pmu {
+ compatible = "arm,cortex-a7-pmu";
+ interrupt-parent = <&gpc>;
+ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gpc>;
ranges;
- pmu {
- compatible = "arm,cortex-a7-pmu";
- interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
ocram: sram@900000 {
compatible = "mmio-sram";
reg = <0x00900000 0x20000>;
fsl,anatop = <&anatop>;
};
- tempmon: tempmon {
- compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
- interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
- fsl,tempmon = <&anatop>;
- nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
- nvmem-cell-names = "calib", "temp_grade";
- clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
- };
-
snvs: snvs@20cc000 {
compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
reg = <0x020cc000 0x4000>;