drm/amd/display: Fix check for whether dmcu fw is running

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index da83412af3064f307066243e0c60524bd4f39ede..a3742827157361ac0c3c57733eb845cd34ea4720 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -1930,12 +1930,18 @@ bool dc_link_set_backlight_level(const struct dc_link *link, uint32_t level,
 {
        struct dc  *core_dc = link->ctx->dc;
        struct abm *abm = core_dc->res_pool->abm;
+       struct dmcu *dmcu = core_dc->res_pool->dmcu;
        unsigned int controller_id = 0;
+       bool use_smooth_brightness = true;
        int i;
 
-       if ((abm == NULL) || (abm->funcs->set_backlight_level == NULL))
+       if ((dmcu == NULL) ||
+               (abm == NULL) ||
+               (abm->funcs->set_backlight_level == NULL))
                return false;
 
+       use_smooth_brightness = dmcu->funcs->is_dmcu_initialized(dmcu);
+
        dm_logger_write(link->ctx->logger, LOG_BACKLIGHT,
                        "New Backlight level: %d (0x%X)\n", level, level);
 
@@ -1958,7 +1964,8 @@ bool dc_link_set_backlight_level(const struct dc_link *link, uint32_t level,
                                abm,
                                level,
                                frame_ramp,
-                               controller_id);
+                               controller_id,
+                               use_smooth_brightness);
        }
 
        return true;

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c
index 3fe8e697483fff2c9b33d7c5e3f948c7cc68ac38..b48190f549079bb113dfc7d370fa8c7ff0c59439 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c
@@ -385,21 +385,12 @@ static bool dce_abm_init_backlight(struct abm *abm)
        return true;
 }
 
-static bool is_dmcu_initialized(struct abm *abm)
-{
-       struct dce_abm *abm_dce = TO_DCE_ABM(abm);
-       unsigned int dmcu_uc_reset;
-
-       REG_GET(DMCU_STATUS, UC_IN_RESET, &dmcu_uc_reset);
-
-       return !dmcu_uc_reset;
-}
-
 static bool dce_abm_set_backlight_level(
                struct abm *abm,
                unsigned int backlight_level,
                unsigned int frame_ramp,
-               unsigned int controller_id)
+               unsigned int controller_id,
+               bool use_smooth_brightness)
 {
        struct dce_abm *abm_dce = TO_DCE_ABM(abm);
 
@@ -408,7 +399,7 @@ static bool dce_abm_set_backlight_level(
                        backlight_level, backlight_level);
 
        /* If DMCU is in reset state, DMCU is uninitialized */
-       if (is_dmcu_initialized(abm))
+       if (use_smooth_brightness)
                dmcu_set_backlight_level(abm_dce,
                                backlight_level,
                                frame_ramp,
@@ -425,8 +416,7 @@ static const struct abm_funcs dce_funcs = {
        .init_backlight = dce_abm_init_backlight,
        .set_backlight_level = dce_abm_set_backlight_level,
        .get_current_backlight_8_bit = dce_abm_get_current_backlight_8_bit,
-       .set_abm_immediate_disable = dce_abm_immediate_disable,
-       .is_dmcu_initialized = is_dmcu_initialized
+       .set_abm_immediate_disable = dce_abm_immediate_disable
 };
 
 static void dce_abm_construct(

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.h b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.h
index 59e909ec88f22778d9917fb754875a9e79da0c59..ff9436966041098ed84e586240cf779854301dbe 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.h
@@ -37,8 +37,7 @@
        SR(LVTMA_PWRSEQ_REF_DIV), \
        SR(MASTER_COMM_CNTL_REG), \
        SR(MASTER_COMM_CMD_REG), \
-       SR(MASTER_COMM_DATA_REG1), \
-       SR(DMCU_STATUS)
+       SR(MASTER_COMM_DATA_REG1)
 
 #define ABM_DCE110_COMMON_REG_LIST() \
        ABM_COMMON_REG_LIST_DCE_BASE(), \
@@ -84,8 +83,7 @@
        ABM_SF(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, mask_sh), \
        ABM_SF(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE0, mask_sh), \
        ABM_SF(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE1, mask_sh), \
-       ABM_SF(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE2, mask_sh), \
-       ABM_SF(DMCU_STATUS, UC_IN_RESET, mask_sh)
+       ABM_SF(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE2, mask_sh)
 
 #define ABM_MASK_SH_LIST_DCE110(mask_sh) \
        ABM_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(mask_sh), \
@@ -174,7 +172,6 @@
        type MASTER_COMM_CMD_REG_BYTE2; \
        type BL_PWM_REF_DIV; \
        type BL_PWM_EN; \
-       type UC_IN_RESET; \
        type BL_PWM_GRP1_IGNORE_MASTER_LOCK_EN; \
        type BL_PWM_GRP1_REG_LOCK; \
        type BL_PWM_GRP1_REG_UPDATE_PENDING
@@ -206,7 +203,6 @@ struct dce_abm_registers {
        uint32_t MASTER_COMM_CMD_REG;
        uint32_t MASTER_COMM_DATA_REG1;
        uint32_t BIOS_SCRATCH_2;
-       uint32_t DMCU_STATUS;
        uint32_t BL_PWM_GRP1_REG_LOCK;
 };
 

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c
index 9031d22285eab98578db34ea956f73bb6f6b300e..9e98a5f39a6dbbec76a9bb296f6327b20ef34fd0 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c
@@ -29,7 +29,6 @@
 #include "fixed32_32.h"
 #include "bios_parser_interface.h"
 #include "dc.h"
-#include "dce_abm.h"
 #include "dmcu.h"
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
 #include "dcn_calcs.h"
@@ -384,7 +383,6 @@ static int dce112_set_clock(
        struct bp_set_dce_clock_parameters dce_clk_params;
        struct dc_bios *bp = clk->ctx->dc_bios;
        struct dc *core_dc = clk->ctx->dc;
-       struct abm *abm =  core_dc->res_pool->abm;
        struct dmcu *dmcu = core_dc->res_pool->dmcu;
        int actual_clock = requested_clk_khz;
        /* Prepare to program display clock*/
@@ -417,7 +415,7 @@ static int dce112_set_clock(
 
        bp->funcs->set_dce_clock(bp, &dce_clk_params);
 
-       if (abm->funcs->is_dmcu_initialized(abm) && clk_dce->dfs_bypass_disp_clk != actual_clock)
+       if (clk_dce->dfs_bypass_disp_clk != actual_clock)
                dmcu->funcs->set_psr_wait_loop(dmcu,
                                actual_clock / 1000 / 7);
        clk_dce->dfs_bypass_disp_clk = actual_clock;

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c b/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
index a6de99db0444deb729c9da06ca212b9d70109204..f663adb335849746af6c420d69cb424684c30bb5 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
@@ -263,15 +263,35 @@ static void dce_dmcu_setup_psr(struct dmcu *dmcu,
        REG_UPDATE(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 1);
 }
 
+static bool dce_is_dmcu_initialized(struct dmcu *dmcu)
+{
+       struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);
+       unsigned int dmcu_uc_reset;
+
+       /* microcontroller is not running */
+       REG_GET(DMCU_STATUS, UC_IN_RESET, &dmcu_uc_reset);
+
+       /* DMCU is not running */
+       if (dmcu_uc_reset)
+               return false;
+
+       return true;
+}
+
 static void dce_psr_wait_loop(
        struct dmcu *dmcu,
        unsigned int wait_loop_number)
 {
        struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu);
        union dce_dmcu_psr_config_data_wait_loop_reg1 masterCmdData1;
+
        if (dmcu->cached_wait_loop_number == wait_loop_number)
                return;
 
+       /* DMCU is not running */
+       if (!dce_is_dmcu_initialized(dmcu))
+               return;
+
        /* waitDMCUReadyForCmd */
        REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000);
 
@@ -691,6 +711,14 @@ static void dcn10_get_psr_wait_loop(
        return;
 }
 
+static bool dcn10_is_dmcu_initialized(struct dmcu *dmcu)
+{
+       /* microcontroller is not running */
+       if (dmcu->dmcu_state != DMCU_RUNNING)
+               return false;
+       return true;
+}
+
 #endif
 
 static const struct dmcu_funcs dce_funcs = {
@@ -700,7 +728,8 @@ static const struct dmcu_funcs dce_funcs = {
        .setup_psr = dce_dmcu_setup_psr,
        .get_psr_state = dce_get_dmcu_psr_state,
        .set_psr_wait_loop = dce_psr_wait_loop,
-       .get_psr_wait_loop = dce_get_psr_wait_loop
+       .get_psr_wait_loop = dce_get_psr_wait_loop,
+       .is_dmcu_initialized = dce_is_dmcu_initialized
 };
 
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
@@ -711,7 +740,8 @@ static const struct dmcu_funcs dcn10_funcs = {
        .setup_psr = dcn10_dmcu_setup_psr,
        .get_psr_state = dcn10_get_dmcu_psr_state,
        .set_psr_wait_loop = dcn10_psr_wait_loop,
-       .get_psr_wait_loop = dcn10_get_psr_wait_loop
+       .get_psr_wait_loop = dcn10_get_psr_wait_loop,
+       .is_dmcu_initialized = dcn10_is_dmcu_initialized
 };
 #endif
 

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h b/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h
index 4c25e2dd28f8ee4a6bebcca0e272992ea26a181c..1d4546f2313506a23449fccb137a834526bf0d23 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h
@@ -62,6 +62,8 @@
                        DMCU_ENABLE, mask_sh), \
        DMCU_SF(DMCU_STATUS, \
                        UC_IN_STOP_MODE, mask_sh), \
+       DMCU_SF(DMCU_STATUS, \
+                       UC_IN_RESET, mask_sh), \
        DMCU_SF(DMCU_RAM_ACCESS_CTRL, \
                        IRAM_HOST_ACCESS_EN, mask_sh), \
        DMCU_SF(DMCU_RAM_ACCESS_CTRL, \
@@ -98,6 +100,7 @@
        type IRAM_RD_ADDR_AUTO_INC; \
        type DMCU_ENABLE; \
        type UC_IN_STOP_MODE; \
+       type UC_IN_RESET; \
        type MASTER_COMM_CMD_REG_BYTE0; \
        type MASTER_COMM_INTERRUPT; \
        type DPHY_RX_FAST_TRAINING_CAPABLE; \

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/abm.h b/drivers/gpu/drm/amd/display/dc/inc/hw/abm.h
index 48217ecfabd418bbcb75bdd6f2504babd95a5746..a83a484946133d00311c8f1219ba2bcf17527805 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/abm.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/abm.h
@@ -50,9 +50,9 @@ struct abm_funcs {
        bool (*set_backlight_level)(struct abm *abm,
                        unsigned int backlight_level,
                        unsigned int frame_ramp,
-                       unsigned int controller_id);
+                       unsigned int controller_id,
+                       bool use_smooth_brightness);
        unsigned int (*get_current_backlight_8_bit)(struct abm *abm);
-       bool (*is_dmcu_initialized)(struct abm *abm);
 };
 
 #endif

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h
index b59712b41b8139ee19828c366ce4581569c84185..ce206355461b1e4496b80f76dd5e42a1ad38a11f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h
@@ -63,6 +63,7 @@ struct dmcu_funcs {
                        unsigned int wait_loop_number);
        void (*get_psr_wait_loop)(struct dmcu *dmcu,
                        unsigned int *psr_wait_loop_number);
+       bool (*is_dmcu_initialized)(struct dmcu *dmcu);
 };
 
 #endif