}
int flexcop_i2c_request(struct flexcop_i2c_adapter *i2c,
- flexcop_access_op_t op, u8 chipaddr, u8 addr, u8 *buf, u16 len)
+ flexcop_access_op_t op, u8 chipaddr,
+ u8 start_addr, u8 *buf, u16 size)
{
int ret;
-
-#ifdef DUMP_I2C_MESSAGES
- int i;
-#endif
+ int len = size;
+ u8 *p;
+ u8 addr = start_addr;
u16 bytes_to_transfer;
flexcop_ibi_value r100;
- deb_i2c("op = %d\n",op);
+ deb_i2c("port %d %s(%02x): register %02x, size: %d\n",
+ i2c->port,
+ op == FC_READ ? "rd" : "wr",
+ chipaddr, start_addr, size);
r100.raw = 0;
r100.tw_sm_c_100.chipaddr = chipaddr;
r100.tw_sm_c_100.twoWS_rw = op;
r100.tw_sm_c_100.twoWS_port_reg = i2c->port;
-#ifdef DUMP_I2C_MESSAGES
- printk(KERN_DEBUG "%d ", i2c->port);
- if (op == FC_READ)
- printk(KERN_CONT "rd(");
- else
- printk(KERN_CONT "wr(");
- printk(KERN_CONT "%02x): %02x ", chipaddr, addr);
-#endif
-
/* in that case addr is the only value ->
* we write it twice as baseaddr and val0
* BBTI is doing it like that for ISL6421 at least */
if (i2c->no_base_addr && len == 0 && op == FC_WRITE) {
- buf = &addr;
+ buf = &start_addr;
len = 1;
}
+ p = buf;
+
while (len != 0) {
bytes_to_transfer = len > 4 ? 4 : len;
r100.tw_sm_c_100.baseaddr = addr;
if (op == FC_READ)
- ret = flexcop_i2c_read4(i2c, r100, buf);
+ ret = flexcop_i2c_read4(i2c, r100, p);
else
- ret = flexcop_i2c_write4(i2c->fc, r100, buf);
-
-#ifdef DUMP_I2C_MESSAGES
- for (i = 0; i < bytes_to_transfer; i++)
- printk(KERN_CONT "%02x ", buf[i]);
-#endif
+ ret = flexcop_i2c_write4(i2c->fc, r100, p);
if (ret < 0)
return ret;
- buf += bytes_to_transfer;
+ p += bytes_to_transfer;
addr += bytes_to_transfer;
len -= bytes_to_transfer;
}
-
-#ifdef DUMP_I2C_MESSAGES
- printk(KERN_CONT "\n");
-#endif
+ deb_i2c_dump("port %d %s(%02x): register %02x: %*ph\n",
+ i2c->port,
+ op == FC_READ ? "rd" : "wr",
+ chipaddr, start_addr, size, buf);
return 0;
}