firewire: add CSR BUSY_TIMEOUT support
authorClemens Ladisch <clemens@ladisch.de>
Thu, 10 Jun 2010 06:34:13 +0000 (08:34 +0200)
committerClemens Ladisch <clemens@ladisch.de>
Thu, 10 Jun 2010 06:34:13 +0000 (08:34 +0200)
Implement the BUSY_TIMEOUT register, which is required for nodes that
support retries.

Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
drivers/firewire/core-transaction.c
drivers/firewire/ohci.c

index 2a390726fa769c50df03363db2f5828b444a5c67..8146133818dc65d3392fb73a1c71056d11819eda 100644 (file)
@@ -1115,6 +1115,17 @@ static void handle_registers(struct fw_card *card, struct fw_request *request,
                        rcode = RCODE_TYPE_ERROR;
                break;
 
+       case CSR_BUSY_TIMEOUT:
+               if (tcode == TCODE_READ_QUADLET_REQUEST)
+                       *data = cpu_to_be32(card->driver->
+                                       read_csr_reg(card, CSR_BUSY_TIMEOUT));
+               else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
+                       card->driver->write_csr_reg(card, CSR_BUSY_TIMEOUT,
+                                                   be32_to_cpu(*data));
+               else
+                       rcode = RCODE_TYPE_ERROR;
+               break;
+
        case CSR_BROADCAST_CHANNEL:
                if (tcode == TCODE_READ_QUADLET_REQUEST)
                        *data = cpu_to_be32(card->broadcast_channel);
@@ -1140,9 +1151,6 @@ static void handle_registers(struct fw_card *card, struct fw_request *request,
                BUG();
                break;
 
-       case CSR_BUSY_TIMEOUT:
-               /* FIXME: Implement this. */
-
        default:
                rcode = RCODE_ADDRESS_ERROR;
                break;
index 3d4badb7c79b9e59a7f16eeb6c0a3b8c30166fb9..9c588fd01250b1fee6fc40e0aaedb85fd07f16e3 100644 (file)
@@ -1731,7 +1731,8 @@ static int ohci_enable(struct fw_card *card,
        reg_write(ohci, OHCI1394_ATRetries,
                  OHCI1394_MAX_AT_REQ_RETRIES |
                  (OHCI1394_MAX_AT_RESP_RETRIES << 4) |
-                 (OHCI1394_MAX_PHYS_RESP_RETRIES << 8));
+                 (OHCI1394_MAX_PHYS_RESP_RETRIES << 8) |
+                 (200 << 16));
 
        seconds = lower_32_bits(get_seconds());
        reg_write(ohci, OHCI1394_IsochronousCycleTimer, seconds << 25);
@@ -2023,6 +2024,10 @@ static u32 ohci_read_csr_reg(struct fw_card *card, int csr_offset)
                spin_unlock_irqrestore(&ohci->lock, flags);
                return value;
 
+       case CSR_BUSY_TIMEOUT:
+               value = reg_read(ohci, OHCI1394_ATRetries);
+               return (value >> 4) & 0x0ffff00f;
+
        default:
                WARN_ON(1);
                return 0;
@@ -2053,6 +2058,13 @@ static void ohci_write_csr_reg(struct fw_card *card, int csr_offset, u32 value)
                spin_unlock_irqrestore(&ohci->lock, flags);
                break;
 
+       case CSR_BUSY_TIMEOUT:
+               value = (value & 0xf) | ((value & 0xf) << 4) |
+                       ((value & 0xf) << 8) | ((value & 0x0ffff000) << 4);
+               reg_write(ohci, OHCI1394_ATRetries, value);
+               flush_writes(ohci);
+               break;
+
        default:
                WARN_ON(1);
                break;