drm/amdgpu: when dpm disabled, also need to stop/start vce.
authorRex Zhu <Rex.Zhu@amd.com>
Wed, 25 Jan 2017 09:35:14 +0000 (17:35 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 8 Feb 2017 22:22:09 +0000 (17:22 -0500)
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

index 79bc9c7aad45f27056e1ce91fa3bb7b29bad7741..e2c06780ce49e6a934480ee853ab6ff92bbd4a91 100644 (file)
@@ -321,6 +321,10 @@ static void amdgpu_vce_idle_work_handler(struct work_struct *work)
                        amdgpu_dpm_enable_vce(adev, false);
                } else {
                        amdgpu_asic_set_vce_clocks(adev, 0, 0);
+                       amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
+                                                           AMD_PG_STATE_GATE);
+                       amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
+                                                           AMD_CG_STATE_GATE);
                }
        } else {
                schedule_delayed_work(&adev->vce.idle_work, VCE_IDLE_TIMEOUT);
@@ -346,6 +350,11 @@ void amdgpu_vce_ring_begin_use(struct amdgpu_ring *ring)
                        amdgpu_dpm_enable_vce(adev, true);
                } else {
                        amdgpu_asic_set_vce_clocks(adev, 53300, 40000);
+                       amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
+                                                           AMD_CG_STATE_UNGATE);
+                       amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
+                                                           AMD_PG_STATE_UNGATE);
+
                }
        }
        mutex_unlock(&adev->vce.idle_mutex);