case MEDIA_BUS_FMT_BGR565_2X8_LE:
case MEDIA_BUS_FMT_RGB565_2X8_BE:
case MEDIA_BUS_FMT_RGB565_2X8_LE:
- if (mbus_type == V4L2_MBUS_CSI2)
+ if (mbus_type == V4L2_MBUS_CSI2_DPHY)
cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_RGB565;
else
cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_BAYER;
else
csicfg->clk_mode = IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE;
break;
- case V4L2_MBUS_CSI2:
+ case V4L2_MBUS_CSI2_DPHY:
/*
* MIPI CSI-2 requires non gated clock mode, all other
* parameters are not applicable for MIPI CSI-2 bus.
if (vc > 3)
return -EINVAL;
- ret = mbus_code_to_bus_cfg(&cfg, mbus_fmt->code, V4L2_MBUS_CSI2);
+ ret = mbus_code_to_bus_cfg(&cfg, mbus_fmt->code, V4L2_MBUS_CSI2_DPHY);
if (ret < 0)
return ret;
struct adv7180_state *state = to_state(sd);
if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
- cfg->type = V4L2_MBUS_CSI2;
+ cfg->type = V4L2_MBUS_CSI2_DPHY;
cfg->flags = V4L2_MBUS_CSI2_1_LANE |
V4L2_MBUS_CSI2_CHANNEL_0 |
V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
goto power_off;
/* We're done here for DVP bus, while CSI-2 needs setup. */
- if (sensor->ep.bus_type != V4L2_MBUS_CSI2)
+ if (sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY)
return 0;
/*
usleep_range(500, 1000);
} else {
- if (sensor->ep.bus_type == V4L2_MBUS_CSI2) {
+ if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
/* Reset MIPI bus settings to their default values. */
ov5640_write_reg(sensor,
OV5640_REG_IO_MIPI_CTRL00, 0x58);
sensor->pending_fmt_change = false;
}
- if (sensor->ep.bus_type == V4L2_MBUS_CSI2)
+ if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
ret = ov5640_set_stream_mipi(sensor, enable);
else
ret = ov5640_set_stream_dvp(sensor, enable);
return ret;
}
- if (ov5645->ep.bus_type != V4L2_MBUS_CSI2) {
+ if (ov5645->ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
dev_err(dev, "invalid bus type, must be CSI2\n");
return -EINVAL;
}
return ret;
}
- if (ov7251->ep.bus_type != V4L2_MBUS_CSI2) {
+ if (ov7251->ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
dev_err(dev, "invalid bus type (%u), must be CSI2 (%u)\n",
- ov7251->ep.bus_type, V4L2_MBUS_CSI2);
+ ov7251->ep.bus_type, V4L2_MBUS_CSI2_DPHY);
return -EINVAL;
}
if (ret)
return ret;
- if (ep.bus_type != V4L2_MBUS_CSI2) {
+ if (ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
dev_err(dev, "unsupported bus type\n");
return -EINVAL;
}
{
u16 en_pkts;
- if (state->bus_type == V4L2_MBUS_CSI2)
+ if (state->bus_type == V4L2_MBUS_CSI2_DPHY)
en_pkts = EN_PACKETS_CSI2;
else
en_pkts = 0;
state->bus_type = ep.bus_type;
switch (state->bus_type) {
- case V4L2_MBUS_CSI2:
+ case V4L2_MBUS_CSI2_DPHY:
state->nlanes = ep.bus.mipi_csi2.num_data_lanes;
break;
case V4L2_MBUS_PARALLEL:
* but there is nothing indicating how to switch between both
* in the datasheet. For now default BT.601 interface is assumed.
*/
- if (bus_type == V4L2_MBUS_CSI2)
+ if (bus_type == V4L2_MBUS_CSI2_DPHY)
cfg = nlanes;
else if (bus_type != V4L2_MBUS_PARALLEL)
return -EINVAL;
goto out_err;
switch (bus_cfg->bus_type) {
- case V4L2_MBUS_CSI2:
+ case V4L2_MBUS_CSI2_DPHY:
hwcfg->csi_signalling_mode = SMIAPP_CSI_SIGNALLING_MODE_CSI2;
hwcfg->lanes = bus_cfg->bus.mipi_csi2.num_data_lanes;
break;
static int ov5642_g_mbus_config(struct v4l2_subdev *sd,
struct v4l2_mbus_config *cfg)
{
- cfg->type = V4L2_MBUS_CSI2;
+ cfg->type = V4L2_MBUS_CSI2_DPHY;
cfg->flags = V4L2_MBUS_CSI2_2_LANE | V4L2_MBUS_CSI2_CHANNEL_0 |
V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
{
struct tc358743_state *state = to_state(sd);
- cfg->type = V4L2_MBUS_CSI2;
+ cfg->type = V4L2_MBUS_CSI2_DPHY;
/* Support for non-continuous CSI-2 clock is missing in the driver */
cfg->flags = V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
goto put_node;
}
- if (endpoint->bus_type != V4L2_MBUS_CSI2 ||
+ if (endpoint->bus_type != V4L2_MBUS_CSI2_DPHY ||
endpoint->bus.mipi_csi2.num_data_lanes == 0 ||
endpoint->nr_of_link_frequencies == 0) {
dev_err(dev, "missing CSI-2 properties in endpoint\n");
struct sensor_async_subdev *s_asd =
container_of(asd, struct sensor_async_subdev, asd);
- if (vep->bus_type != V4L2_MBUS_CSI2) {
+ if (vep->bus_type != V4L2_MBUS_CSI2_DPHY) {
dev_err(dev, "Only CSI2 bus type is currently supported\n");
return -EINVAL;
}
return ret;
}
- if (v4l2_ep.bus_type != V4L2_MBUS_CSI2) {
+ if (v4l2_ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
dev_err(csi2rx->dev, "Unsupported media bus type: 0x%x\n",
v4l2_ep.bus_type);
of_node_put(ep);
goto out;
}
- if (v4l2_ep.bus_type != V4L2_MBUS_CSI2) {
+ if (v4l2_ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
dev_err(csi2tx->dev, "Unsupported media bus type: 0x%x\n",
v4l2_ep.bus_type);
ret = -EINVAL;
/*
* This field controls the generation of EOF(DVP only)
*/
- if (cam->bus_type != V4L2_MBUS_CSI2)
+ if (cam->bus_type != V4L2_MBUS_CSI2_DPHY)
mcam_reg_set_bit(cam, REG_CTRL0,
C0_EOF_VSYNC | C0_VEDGE_CTRL);
}
cam->calc_dphy(cam);
cam_dbg(cam, "camera: DPHY sets: dphy3=0x%x, dphy5=0x%x, dphy6=0x%x\n",
cam->dphy[0], cam->dphy[1], cam->dphy[2]);
- if (cam->bus_type == V4L2_MBUS_CSI2)
+ if (cam->bus_type == V4L2_MBUS_CSI2_DPHY)
mcam_enable_mipi(cam);
else
mcam_disable_mipi(cam);
mcam->mclk_div = pdata->mclk_div;
mcam->bus_type = pdata->bus_type;
mcam->dphy = pdata->dphy;
- if (mcam->bus_type == V4L2_MBUS_CSI2) {
+ if (mcam->bus_type == V4L2_MBUS_CSI2_DPHY) {
cam->mipi_clk = devm_clk_get(mcam->dev, "mipi");
if ((IS_ERR(cam->mipi_clk) && mcam->dphy[2] == 0))
return PTR_ERR(cam->mipi_clk);
dev_dbg(dev, "CSI-1/CCP-2 configuration\n");
csi1 = true;
break;
- case V4L2_MBUS_CSI2:
+ case V4L2_MBUS_CSI2_DPHY:
dev_dbg(dev, "CSI-2 configuration\n");
csi1 = false;
break;
mode = common_flags & (V4L2_MBUS_MASTER | V4L2_MBUS_SLAVE);
return (!hsync || !vsync || !pclk || !data || !mode) ?
0 : common_flags;
- case V4L2_MBUS_CSI2:
+ case V4L2_MBUS_CSI2_DPHY:
mipi_lanes = common_flags & V4L2_MBUS_CSI2_LANES;
mipi_clock = common_flags & (V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK |
V4L2_MBUS_CSI2_CONTINUOUS_CLOCK);
if (vep->base.port || vep->base.id)
return -ENOTCONN;
- if (vep->bus_type != V4L2_MBUS_CSI2) {
+ if (vep->bus_type != V4L2_MBUS_CSI2_DPHY) {
dev_err(priv->dev, "Unsupported bus: %u\n", vep->bus_type);
return -EINVAL;
}
mode = common_flags & (V4L2_MBUS_MASTER | V4L2_MBUS_SLAVE);
return (!hsync || !vsync || !pclk || !data || !mode) ?
0 : common_flags;
- case V4L2_MBUS_CSI2:
+ case V4L2_MBUS_CSI2_DPHY:
mipi_lanes = common_flags & V4L2_MBUS_CSI2_LANES;
mipi_clock = common_flags & (V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK |
V4L2_MBUS_CSI2_CONTINUOUS_CLOCK);
return -ENODEV;
}
- if (ep.bus_type == V4L2_MBUS_CSI2) {
+ if (ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
dev_err(&pdev->dev, "CSI bus not supported\n");
return -ENODEV;
}
}
v4l2_fwnode_endpoint_parse(of_fwnode_handle(remote_ep), endpoint);
- if (endpoint->bus_type != V4L2_MBUS_CSI2) {
+ if (endpoint->bus_type != V4L2_MBUS_CSI2_DPHY) {
ctx_err(ctx, "Port:%d sub-device %pOFn is not a CSI2 device\n",
inst, sensor_node);
goto cleanup_exit;
}
bus->flags = flags;
- vep->bus_type = V4L2_MBUS_CSI2;
+ vep->bus_type = V4L2_MBUS_CSI2_DPHY;
return 0;
}
static inline bool is_parallel_bus(struct v4l2_fwnode_endpoint *ep)
{
- return ep->bus_type != V4L2_MBUS_CSI2;
+ return ep->bus_type != V4L2_MBUS_CSI2_DPHY;
}
static inline bool is_parallel_16bit_bus(struct v4l2_fwnode_endpoint *ep)
return -EINVAL;
}
- if (vep->bus_type != V4L2_MBUS_CSI2) {
+ if (vep->bus_type != V4L2_MBUS_CSI2_DPHY) {
v4l2_err(&csi2->sd, "invalid bus type, must be MIPI CSI2\n");
return -EINVAL;
}
static int imx074_g_mbus_config(struct v4l2_subdev *sd,
struct v4l2_mbus_config *cfg)
{
- cfg->type = V4L2_MBUS_CSI2;
+ cfg->type = V4L2_MBUS_CSI2_DPHY;
cfg->flags = V4L2_MBUS_CSI2_2_LANE |
V4L2_MBUS_CSI2_CHANNEL_0 |
V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
* also be used for BT.1120
* @V4L2_MBUS_CSI1: MIPI CSI-1 serial interface
* @V4L2_MBUS_CCP2: CCP2 (Compact Camera Port 2)
- * @V4L2_MBUS_CSI2: MIPI CSI-2 serial interface
+ * @V4L2_MBUS_CSI2_DPHY: MIPI CSI-2 serial interface, with D-PHY
+ * @V4L2_MBUS_CSI2_CPHY: MIPI CSI-2 serial interface, with C-PHY
*/
enum v4l2_mbus_type {
V4L2_MBUS_PARALLEL,
V4L2_MBUS_BT656,
V4L2_MBUS_CSI1,
V4L2_MBUS_CCP2,
- V4L2_MBUS_CSI2,
+ V4L2_MBUS_CSI2_DPHY,
+ V4L2_MBUS_CSI2_CPHY,
};
/**