In function dsi_compute_interleave_lp(), the escape clock/LP clock time period
is calculated incorrectly. The escape clock/LP clock is calculated as:
LP Clock(Hz) = DSI_FCLK(Hz) / lp_clk_div
Since we are calculating the time period of LP clock, the LP clock divider
should be multiplied with the time period of DSI_FCLK.
Calculating incorrect value of txclkesc results in incorrect calculation of LP
interleaving parameters, it also creates a possibility of a divide by zero
error.
Reported-by: Sureshkumar Manimuthu <mail2msuresh@ti.com>
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
/* CLKIN4DDR = 16 * TXBYTECLKHS */
tlp_avail = thsbyte_clk * (blank - trans_lp);
- ttxclkesc = tdsi_fclk / lp_clk_div;
+ ttxclkesc = tdsi_fclk * lp_clk_div;
lp_inter = ((tlp_avail - 8 * thsbyte_clk - 5 * tdsi_fclk) / ttxclkesc -
26) / 16;