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ARM: zynq: DT: Add DDRC node
author
Soren Brinkmann
<soren.brinkmann@xilinx.com>
Tue, 2 Sep 2014 21:19:08 +0000
(14:19 -0700)
committer
Michal Simek
<michal.simek@xilinx.com>
Tue, 16 Sep 2014 10:55:06 +0000
(12:55 +0200)
Add the DDR controller to the Zynq devicetree.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/boot/dts/zynq-7000.dtsi
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diff --git
a/arch/arm/boot/dts/zynq-7000.dtsi
b/arch/arm/boot/dts/zynq-7000.dtsi
index 6cc83d4c6c76100ebdc2863a28ae69d89f96fef9..587cadcf7001ad7854fd3e9a07c5c5da0c8937e6 100644
(file)
--- a/
arch/arm/boot/dts/zynq-7000.dtsi
+++ b/
arch/arm/boot/dts/zynq-7000.dtsi
@@
-146,6
+146,11
@@
cache-level = <2>;
};
+ memory-controller@f8006000 {
+ compatible = "xlnx,zynq-ddrc-a05";
+ reg = <0xf8006000 0x1000>;
+ } ;
+
uart0: serial@e0000000 {
compatible = "xlnx,xuartps", "cdns,uart-r1p8";
status = "disabled";