MIPS: Use dins to simplify __write_64bit_c0_split()

The code in __write_64bit_c0_split() is used by MIPS32 kernels running
on MIPS64 CPUs to write a 64-bit value to a 64-bit coprocessor 0
register using a single 64-bit dmtc0 instruction. It does this by
combining the 2x 32-bit registers used to hold the 64-bit value into a
single register, which in the existing code involves three steps:

  1) Zero extend register A which holds bits 31:0 of our data, since it
     may have previously held a sign-extended value.

  2) Shift register B which holds bits 63:32 of our data in bits 31:0
     left by 32 bits, such that the bits forming our data are in the
     position they'll be in the final 64-bit value & bits 31:0 of the
     register are zero.

  3) Or the two registers together to form the 64-bit value in one
     64-bit register.

From MIPS r2 onwards we have a dins instruction which can effectively
perform all 3 of those steps using a single instruction.

Add a path for MIPS r2 & beyond which uses dins to take bits 31:0 from
register B & insert them into bits 63:32 of register A, giving us our
full 64-bit value in register A with one instruction.

Since we know that MIPS r2 & above support the sel field for the dmtc0
instruction, we don't bother special casing sel==0. Omiting the sel
field would assemble to exactly the same instruction as when we
explicitly specify that it equals zero.

Signed-off-by: Paul Burton <paul.burton@mips.com>

diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index dd46ab2a4ffd772f3a8b848e0d8d4596a9cb90c2..a3ee982b4c1ad0f577ffb889900bfcbc4279e8bd 100644 (file)
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -16,6 +16,7 @@
 #include <linux/linkage.h>
 #include <linux/types.h>
 #include <asm/hazards.h>
+#include <asm/isa-rev.h>
 #include <asm/war.h>
 
 /*
@@ -1489,7 +1490,15 @@ do {                                                                     \
        unsigned long __flags;                                          \
                                                                        \
        local_irq_save(__flags);                                        \
-       if (sel == 0)                                                   \
+       if (MIPS_ISA_REV >= 2)                                          \
+               __asm__ __volatile__(                                   \
+                       ".set\tpush\n\t"                                \
+                       ".set\t" MIPS_ISA_LEVEL "\n\t"                  \
+                       "dins\t%L0, %M0, 32, 32\n\t"                    \
+                       "dmtc0\t%L0, " #source ", " #sel "\n\t"         \
+                       ".set\tpop"                                     \
+                       : "+r" (__tmp));                                \
+       else if (sel == 0)                                              \
                __asm__ __volatile__(                                   \
                        ".set\tmips64\n\t"                              \
                        "dsll\t%L0, %L0, 32\n\t"                        \