ARM: dts: imx7: Fix typo in watchdog pin name
authorFabio Estevam <fabio.estevam@nxp.com>
Sat, 27 May 2017 13:17:52 +0000 (10:17 -0300)
committerShawn Guo <shawnguo@kernel.org>
Sun, 4 Jun 2017 03:51:06 +0000 (11:51 +0800)
Change "WDOD1" to "WDOG1" in watchdog pin names.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx7d-nitrogen7.dts
arch/arm/boot/dts/imx7d-pico.dts
arch/arm/boot/dts/imx7d-pinfunc.h
arch/arm/boot/dts/imx7d-sdb.dts
arch/arm/boot/dts/imx7s-warp.dts

index dd40e49f6c42c40e9825f9dbce85417df494f9af..e7998308861fa395477bfbced53706e810a5e40b 100644 (file)
 
        pinctrl_wdog1: wdog1grp {
                fsl,pins = <
-                       MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B  0x75
+                       MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B  0x75
                >;
        };
 };
index 79b5d83aaace449aeefa2a35b611b8c654541a36..e78c2c9cc28a919f51cbc7fc815dba5aafca69e1 100644 (file)
 &iomuxc_lpsr {
        pinctrl_wdog: wdoggrp {
                fsl,pins = <
-                       MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B  0x74
+                       MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B  0x74
                >;
        };
 };
index f6f7e78f8820e15d40913d244e20ba5eae458331..f2493bc63da42b2d82875e9399141c2f806f34f9 100644 (file)
@@ -17,9 +17,9 @@
 
 #define MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0                       0x0000 0x0030 0x0000 0x0 0x0
 #define MX7D_PAD_LPSR_GPIO1_IO00__PWM4_OUT                        0x0000 0x0030 0x0000 0x1 0x0
-#define MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_ANY                  0x0000 0x0030 0x0000 0x2 0x0
-#define MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B                    0x0000 0x0030 0x0000 0x3 0x0
-#define MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG__RST_B_DEB           0x0000 0x0030 0x0000 0x4 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_ANY                  0x0000 0x0030 0x0000 0x2 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B                    0x0000 0x0030 0x0000 0x3 0x0
+#define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG__RST_B_DEB           0x0000 0x0030 0x0000 0x4 0x0
 #define MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1                       0x0004 0x0034 0x0000 0x0 0x0
 #define MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT                        0x0004 0x0034 0x0000 0x1 0x0
 #define MX7D_PAD_LPSR_GPIO1_IO01__CCM_ENET_REF_CLK3               0x0004 0x0034 0x0000 0x2 0x0
index 77c400f0017a7dcebaabf851a4a9a28e71a81715..4a4b522d17d2b071969621f12742c657bd8a7cc1 100644 (file)
 &iomuxc_lpsr {
        pinctrl_wdog: wdoggrp {
                fsl,pins = <
-                       MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B          0x74
+                       MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B          0x74
                >;
        };
 
index 8dfed85471e1e1b02d73c52d3421cfa1f463ace4..07b63f8b7314595980f928e06c68ee8e602a6111 100644 (file)
 &iomuxc_lpsr {
        pinctrl_wdog: wdoggrp {
                fsl,pins = <
-                       MX7D_PAD_LPSR_GPIO1_IO00__WDOD1_WDOG_B  0x74
+                       MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B  0x74
                >;
        };
 };