drm/i915: Init infoframe vfuncs for DP encoders as well

DP ports may want to use the video DIP for SDP transmission, so let's
initialize the vfuncs for DP encoders as well. The only exception is
port A eDP prior to HSW as that one doesn't have a video DIP instance.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170818134958.15502-6-ville.syrjala@linux.intel.com

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index a859f2e899c208526d4bef13555d4a6527f7b8e1..e13b720fcd022b1197f73b08cc8099fb81a038d8 100644 (file)
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2736,6 +2736,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
        intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
        intel_encoder->cloneable = 0;
 
+       intel_infoframe_init(intel_dig_port);
+
        if (init_dp) {
                if (!intel_ddi_init_dp_connector(intel_dig_port))
                        goto err;

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index e38565829d19cccd63278ee4c3d1d4a45a359fa4..caa8b1e07e7e4a039cb99afdcb052b7912860553 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -6189,6 +6189,9 @@ bool intel_dp_init(struct drm_i915_private *dev_priv,
        intel_dig_port->hpd_pulse = intel_dp_hpd_pulse;
        dev_priv->hotplug.irq_port[port] = intel_dig_port;
 
+       if (port != PORT_A)
+               intel_infoframe_init(intel_dig_port);
+
        if (!intel_dp_init_connector(intel_dig_port, intel_connector))
                goto err_init_connector;
 

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 7aa9a9be3ca6b8bcecd2c80433bed9834f172243..d45f50848b2956ab11d7e181e15963f2d13540b7 100644 (file)
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1650,6 +1650,7 @@ void intel_hdmi_handle_sink_scrambling(struct intel_encoder *intel_encoder,
                                       bool high_tmds_clock_ratio,
                                       bool scrambling);
 void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable);
+void intel_infoframe_init(struct intel_digital_port *intel_dig_port);
 
 
 /* intel_lvds.c */

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index ec8d65088bf8a1eb012a9782a49737fafcdd00c7..65083876294d254c39f964e545d82c30c5b1cd2a 100644 (file)
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1961,6 +1961,34 @@ static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
        return ddc_pin;
 }
 
+void intel_infoframe_init(struct intel_digital_port *intel_dig_port)
+{
+       struct drm_i915_private *dev_priv =
+               to_i915(intel_dig_port->base.base.dev);
+
+       if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+               intel_dig_port->write_infoframe = vlv_write_infoframe;
+               intel_dig_port->set_infoframes = vlv_set_infoframes;
+               intel_dig_port->infoframe_enabled = vlv_infoframe_enabled;
+       } else if (IS_G4X(dev_priv)) {
+               intel_dig_port->write_infoframe = g4x_write_infoframe;
+               intel_dig_port->set_infoframes = g4x_set_infoframes;
+               intel_dig_port->infoframe_enabled = g4x_infoframe_enabled;
+       } else if (HAS_DDI(dev_priv)) {
+               intel_dig_port->write_infoframe = hsw_write_infoframe;
+               intel_dig_port->set_infoframes = hsw_set_infoframes;
+               intel_dig_port->infoframe_enabled = hsw_infoframe_enabled;
+       } else if (HAS_PCH_IBX(dev_priv)) {
+               intel_dig_port->write_infoframe = ibx_write_infoframe;
+               intel_dig_port->set_infoframes = ibx_set_infoframes;
+               intel_dig_port->infoframe_enabled = ibx_infoframe_enabled;
+       } else {
+               intel_dig_port->write_infoframe = cpt_write_infoframe;
+               intel_dig_port->set_infoframes = cpt_set_infoframes;
+               intel_dig_port->infoframe_enabled = cpt_infoframe_enabled;
+       }
+}
+
 void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
                               struct intel_connector *intel_connector)
 {
@@ -1996,28 +2024,6 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
                return;
        intel_encoder->hpd_pin = intel_hpd_pin(port);
 
-       if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
-               intel_dig_port->write_infoframe = vlv_write_infoframe;
-               intel_dig_port->set_infoframes = vlv_set_infoframes;
-               intel_dig_port->infoframe_enabled = vlv_infoframe_enabled;
-       } else if (IS_G4X(dev_priv)) {
-               intel_dig_port->write_infoframe = g4x_write_infoframe;
-               intel_dig_port->set_infoframes = g4x_set_infoframes;
-               intel_dig_port->infoframe_enabled = g4x_infoframe_enabled;
-       } else if (HAS_DDI(dev_priv)) {
-               intel_dig_port->write_infoframe = hsw_write_infoframe;
-               intel_dig_port->set_infoframes = hsw_set_infoframes;
-               intel_dig_port->infoframe_enabled = hsw_infoframe_enabled;
-       } else if (HAS_PCH_IBX(dev_priv)) {
-               intel_dig_port->write_infoframe = ibx_write_infoframe;
-               intel_dig_port->set_infoframes = ibx_set_infoframes;
-               intel_dig_port->infoframe_enabled = ibx_infoframe_enabled;
-       } else {
-               intel_dig_port->write_infoframe = cpt_write_infoframe;
-               intel_dig_port->set_infoframes = cpt_set_infoframes;
-               intel_dig_port->infoframe_enabled = cpt_infoframe_enabled;
-       }
-
        if (HAS_DDI(dev_priv))
                intel_connector->get_hw_state = intel_ddi_connector_get_hw_state;
        else
@@ -2116,5 +2122,7 @@ void intel_hdmi_init(struct drm_i915_private *dev_priv,
        intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
        intel_dig_port->max_lanes = 4;
 
+       intel_infoframe_init(intel_dig_port);
+
        intel_hdmi_init_connector(intel_dig_port, intel_connector);
 }